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PDF LTC3718 Data sheet ( Hoja de datos )
| Número de pieza | LTC3718 | |
| Descripción | Low Input Voltage DC/DC Controller | |
| Fabricantes | Linear Technology | |
| Logotipo |  |
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LTC3718
www.DataSheet4U.com
Low Input Voltage
DC/DC Controller for
DDR/QDR Memory Termination
FEATURES
s Very Low VIN(MIN): 1.5V
s Ultrafast Transient Response
s True Current Mode Control
s 5V Drive for N-Channel MOSFETs Eliminates
Auxillary 5V Supply
s No Sense Resistor Required
s Uses Standard 5V Logic-Level N-Channel MOSFETs
s VOUT(MIN): 0.4V
s VOUT Tracks 1/2 VIN or External VREF
s Symmetrical Source and Sink Output Current Limit
s Adjustable Switching Frequency
s tON(MIN) <100ns
s Power Good Output Voltage Monitor
s Programmable Soft-Start
s Output Overvoltage Protection
s Optional Short-Circuit Shutdown Timer
s Small 24-Lead SSOP Package
U
APPLICATIO S
s Bus Termination: DDR/QDR Memory, SSTL, HSTL, ...
s Servers, RAID Systems
s Distributed Power Systems
s Synchronous Buck with General Purpose Boost
DESCRIPTIO
The LTC®3718 is a high current, high efficiency synchro-
nous switching regulator controller for DDR and QDRTM
memory termination. It operates from an input as low as
1.5V and provides a regulated output voltage equal to
(0.5)VIN. The controller uses a valley current control
architecture to enable high frequency operation with very
low on-times without requiring a sense resistor. Operating
frequency is selected by an external resistor and is com-
pensated for variations in VIN and VOUT. The LTC3718 uses
a pair of standard 5V logic level N-channel external
MOSFETs, eliminating the need for expensive P-channel
or low threshold devices.
Forced continuous operation reduces noise and RF inter-
ference. Fault protection is provided by internal foldback
current limiting, an output overvoltage comparator and an
optional short-circuit timer. Soft-start capability for sup-
ply sequencing can be accomplished using an external
timing capacitor. OPTI-LOOP® compensation allows the
transient response to be optimized over a wide range of
loads and output capacitors.
, LTC and LT are registered trademarks of Linear Technology Corporation.
OPTI-LOOP is a registered trademark of Linear Technology Corporation. No RSENSE is a
trademark of Linear Technology Corporation. QDR RAMs and Quad Data Rate RAMs comprise a
new family of products developed by Cypress Semiconductor, IDT and Micron Technology, Inc.
TYPICAL APPLICATIO
RON
237k
VOUT
CSS
0.1µF
C1 820pF X7R RC 4.75k
RF1 12.1k
SHDN
BOOST
VREF
TG
LTC3718
ION SW1
VFB1 SENSE+
PGOOD PGND1
SENSE–
RUN/SS
ITH
SGND1
BG
INTVCC
VIN1
VIN2
SGND2 PGND2
VFB2
SW2
RF2 37.4k
DB
CMDSH-3
CB
0.33µF
M1
Si7440DP
CIN1
22µF
×2
D1
B340A
VIN
2.5V
L1 0.8µH
M2
Si7440DP
+
D2
B340A
COUT
470µF
×2
VOUT
1.25V
±10A
CIN2
4.7µF
L2
4.7µH
CVCC1
10µF
D3
MBR0520
VIN
COUT: SANYO POSCAP 4TPB470M
L1: SUMIDA CEP125-0R8MC
L2: PANASONIC ELJPC4R7MF
3718 TA01
Figure 1. High Efficiency Bus Termination Supply without Auxiliary 5V Supply
Efficiency vs Load Current
100
90
VIN = 2.5V
VOUT = 1.25V
80
70
60
50
40
30
20
10
0
0.01
FIGURE 1 CIRCUIT
0.1 1
10
LOAD CURRENT (A)
100
3718 G05/TA01a
3718fa
1
1 page  
TYwPwwI.CDaAtaSLhePet4EU.RcomFOR A CE CHARACTERISTICS
LTC3718
Frequency vs Input Voltage
450
400
LOAD = 10A
350
300
250 LOAD = 0A
200
150
100
50
VOUT = 1.25V
FIGURE 1 CIRCUIT
0
1.5 1.7 1.9 2.1 2.3 2.5
INPUT VOLTAGE (V)
2.7
2.9
3718 G07
Load-Step Transient
Load Regulation
0
–0.1
VIN = 2.5V
VOUT = 1.25V
–0.2
–0.3
–0.4
–0.5
FIGURE 1 CIRCUIT
–0.6
01234567
LOAD CURRENT (A)
8 9 10
3718 G08
Start-Up Response
VOUT
200mV/DIV
IL
5A/DIV
VOUT
1V/DIV
IL
2A/DIV
VIN = 2.5V
20µs/DIV
VOUT = 1.25V
LOAD = 500mA TO 10A STEP
FIGURE 1 CIRCUIT
3718 G10.eps
VIN = 2.5V
VOUT = 1.25V
4ms/DIV
LOAD = 0.2Ω
FIGURE 1 CIRCUIT
3718 G09.eps
On-Time vs VON Voltage
1000
IION = 30µA
800
600
400
200
0
0 12
VON VOLTAGE (V)
3
3718 G11
On-Time vs Temperature
300
IION = 30µA
250
200
150
100
50
0
–50 –25
0 25 50 75
TEMPERATURE (°C)
100 125
3718 G12
On-Time vs ION Current
10k
VVON = 0V
1k
100
10
1
10
ION CURRENT (µA)
100
3718 G13
3718fa
5
5 Page 
LTC3718
APPLICATIO S Iwww.DataSheet4U.com FOR ATIO
2.0
1.5
1.0
0.5
0
– 50 0
50 100 150
JUNCTION TEMPERATURE (°C)
3718 F02
Figure 2. RDS(ON) vs Temperature
DTOP
=
VOUT
VIN
DBOT
=
VIN
– VOUT
VIN
The resulting power dissipation in the MOSFETs at maxi-
mum output current are:
PTOP = DTOP IOUT(MAX)2 ρT(TOP) RDS(ON)(MAX)
+ k VIN2 IOUT(MAX) CRSS f
PBOT = DBOT IOUT(MAX)2 ρT(BOT) RDS(ON)(MAX)
Both MOSFETs have I2R losses and the top MOSFET
includes an additional term for transition losses, which are
largest at high input voltages. The constant k = 1.7A–1 can
be used to estimate the amount of transition loss. The
bottom MOSFET losses are greatest when the bottom duty
cycle is near 100%, during a short-circuit or at high input
voltage.
Operating Frequency
The choice of operating frequency is a tradeoff between
efficiency and component size. Low frequency operation
improves efficiency by reducing MOSFET switching losses
but requires larger inductance and/or capacitance in order
to maintain low output ripple voltage.
The operating frequency of LTC3718 applications is deter-
mined implicitly by the one-shot timer that controls the
on-time tON of the top MOSFET switch. The on-time is set
by the current into the ION pin and the voltage at the VON
pin according to:
tON
=
VVON
IION
(10pF)
Tying a resistor RON from VIN to the ION pin yields an on-
time inversely proportional to VIN. For a step-down
converter, this results in approximately constant fre-
quency operation as the input supply varies:
[ ]f = VOUT
Hz
VVONRON(10pF)
To hold frequency constant during output voltage changes,
tie the VON pin to VOUT. The VON pin has internal clamps
that limit its input to the one-shot timer. If the pin is tied
below 0.7V, the input to the one-shot is clamped at 0.7V.
Similarly, if the pin is tied above 2.4V, the input is clamped
at 2.4V.
Because the voltage at the ION pin is about 0.7V, the
current into this pin is not exactly inversely proportional to
VIN, especially in applications with lower input voltages.
To account for the 0.7V drop on the ION pin, the following
equation can be used to calculate frequency:
f = (VIN − 0.7V) • VOUT
VVON • VIN •RON(10pF)
To correct for this error, an additional resistor RON2
connected from the ION pin to the 5V INTVCC supply will
further stabilize the frequency.
RON2
=
5V
0.7V
RON
Changes in the load current magnitude will also cause
frequency shift. Parasitic resistance in the MOSFET
switches and inductor reduce the effective voltage across
the inductance, resulting in increased duty cycle as the
load current increases. By lengthening the on-time slightly
as current increases, constant frequency operation can be
maintained. This is accomplished with a resistive divider
from the ITH pin to the VON pin and VOUT. The values
required will depend on the parasitic resistances in the
specific application. A good starting point is to feed about
25% of the voltage change at the ITH pin to the VON pin as
shown in Figure 3a. Place capacitance on the VON pin to
3718fa
11
11 Page | ||
| Páginas | Total 20 Páginas | |
| PDF Descargar | [ Datasheet LTC3718.PDF ] | |
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