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PDF LM1247 Data sheet ( Hoja de datos )
| Número de pieza | LM1247 | |
| Descripción | 150 MHz I2C Compatible RGB Preamplifier with Internal 512 Character OSD ROM/ 512 Character RAM and 4 DACs | |
| Fabricantes | National Semiconductor | |
| Logotipo |  |
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December 2002
LM1247
150 MHz I2C Compatible RGB Preamplifier with Internal
512 Character OSD ROM, 512 Character RAM and 4
DACs
General Description
The LM1247 pre-amp is an integrated CMOS CRT preamp.
It has an I2C compatible interface which allows control of all
the parameters necessary to directly setup and adjust the
gain and contrast in the CRT display. Brightness and bias
can be controlled through the DAC outputs which are well
matched to the LM2479 and LM2480 integrated bias clamp
ICs. The LM1247 preamp is also designed to be compatible
with the LM246x high gain driver family.
Black level clamping of the video signal is carried out directly
on the AC coupled input signal into the high impedance
preamplifier input, thus eliminating the need for additional
clamp capacitors. Horizontal and vertical blanking of the
outputs is provided. Vertical blanking is optional and its
duration is register programmable.
The IC is packaged in an industry standard 24 lead DIP
molded plastic package.
n I2C compatible microcontroller interface
n OSD override allows OSD messages to override video
and the use of burn-in screens with no video input
n 4 DAC outputs (8-bit resolution) for bus controlled CRT
bias and brightness
n Spot killer which blanks the video outputs when VCC
falls below the specified threshold
n Suitable for use with discrete or integrated clamp, with
software configurable brightness mixer
n Horizontal blanking and OSD synchronization directly
from deflection signals. The blanking can be disabled, if
desired
n Vertical blanking and OSD synchronization directly from
deflection signals. The blanking width is register
programmable and can be disabled, if desired
n Power Saving Mode with 65% power reduction
n Matched to LM246x driver and LM2479/80 bias IC’s
Features
n Internal 512 character OSD ROM usable as either (a)
384 2-color plus 128 4-color characters, (b) 640 2-color
characters, or (c) some combination in between
n Internal 512 character RAM, which can be displayed as
one single or two independent windows
Applications
n Low end 15" and 17" bus controlled monitors with OSD
n 1024x768 displays up to 85 Hz requiring OSD capability
n Very low cost systems with LM246x driver
Internal Block Diagram
FIGURE 1. Order Number LM1247AAG/NA
See NS Package Number N24D
© 2002 National Semiconductor Corporation DS200484
20048401
www.national.com
1 page  
System Interface Signal Characteristics (Continued)
Note 1: Limits of Absolute Maximum Ratings indicate below which damage to the device must not occur.
Note 2: Operating ratings indicate conditions for which the device is functional, but do not guarantee specific performance limits.
Note 3: All voltages are measured with respect to GND, unless otherwise specified.
Note 4: Human body model, 100 pF discharged through a 1.5 kΩ resistor.
Note 5: Input from signal generator: tr, tf < 1 ns.
Note 6: Typical specifications are specified at +25˚C and represent the most likely parametric norm.
Note 7: Datasheet min/max specification limits are guaranteed by design, test, or statistical analysis. The guaranteed specifications apply only for the test conditions
listed. Some performance characteristics may change when the device is not operated under the listed test conditions.
Note 8: The supply current specified is the quiescent current for VCC and 5V Dig with RL = ∞. Load resistors are not required and are not used in the test circuit,
therefore all the supply current is used by the pre-amp.
Note 9: Linearity Error is the maximum variation in step height of a 16 step staircase input signal waveform with a 0.7 VP-P level at the input. All 16 steps equal,
with each at least 100 ns in duration.
Note 10: dt/dVCC = 200*(t5.5V–t4.5V)/ ((t5.5V + t4.5V)) %/V, where: t5.5V is the rise or fall time at VCC = 5.5V, and t4.5V is the rise or fall time at VCC = 4.5V.
Note 11: ∆AV track is a measure of the ability of any two amplifiers to track each other and quantifies the matching of the three gain stages. It is the difference in
gain change between any two amplifiers with the contrast set to AVC−50% and measured relative to the AV max condition. For example, at AV max the three
amplifiers’ gains might be 12.1 dB, 11.9 dB, and 11.8 dB and change to 2.2 dB, 1.9 dB and 1.7 dB respectively for contrast set to AVC−50%. This yields a typical
gain change of 10.0 dB with a tracking change of ±0.2 dB.
Note 12: The ABL input provides smooth decrease in gain over the operational range of 0 dB to −5 dB: ∆AABL = A(VABL = VABL MAX GAIN) – A (VABL =
VABL MIN GAIN). Beyond −5 dB the gain characteristics, linearity and pulse response may depart from normal values.
Note 13: Machine Model ESD test is covered by specification EIAJ IC-121-1981. A 200 pF cap is charged to the specific voltage, then discharged directly into the
IC with no external series resistor (resistance of discharge path must be under 50Ω).
Note 14: Measure output levels of the other two undriven amplifiers relative to the driven amplifier to determine channel separation. Terminate the undriven amplifier
inputs to simulate generator loading. Repeat test at fIN = 10 MHz for VSEP 10 MHz.
Note 15: A minimum pulse width of 200 ns is the guaranteed minimum for a horizontal line of 15 kHz. This limit is guaranteed by design. If a lower line rate is used
then a longer clamp pulse may be required.
Note 16: Adjust input frequency from 10 MHz (AV max reference level) to the −3 dB corner frequency (f−3 dB).
Note 17: Once the spot killer has been activated, the LM1247 remains in the off state until VCC is cycled (reduced below 0.5V and then restored to 5V).
Hexadecimal and Binary Notation
Hexadecimal numbers appear frequently throughout this
document, representing slave and register addresses, and
register values. These appear in the format “0x...”. For ex-
ample, the slave address for writing the registers of the
LM1247 is hexadecimal BA, written as 0xBA. On the other
hand, binary values, where the individual bit values are
shown, are indicated by a trailing “b”. For example, 0xBA is
equal to 10111010b. A subset of bits within a register is
referred to by the bit numbers in brackets following the
register value. For example, the OSD contrast bits are the
fourth and fifth bits of register 0x8438. Since the first bit is bit
0, the OSD contrast register is 0x8438[4:3].
Register Test Settings
Table 1 shows the definitions of the Test Settings 1–8 re-
ferred to in the specifications sections. Each test setting is a
combination of five hexadecimal register values, Contrast,
Gain (Blue, Red, Green) and DC offset.
Control No. of Bits
Contrast
7
B, R, G
Gain
DC Offset
7
3
1
0x7F
(Max)
0x7F
(Max)
0x00
(Min)
2
0x00
Min
0x7F
(Max)
0x05
TABLE 1. Test Settings
3
0x7F
(Max)
0x7F
(Max)
0x07
(Max)
Test Settings
45
0x7F
0x40
(Max)
(50.4%)
Set VO to
2 VP-P
0x05
0x7F
(Max)
0x05
6
0x7F
(Max)
0x40
(50.4%)
0x05
7
0x7F
(Max)
0x00
(Min)
0x05
8
0x7F
(Max)
0x7F
(Max)
0x05
5 www.national.com
5 Page 
Pin Descriptions and Application Information (Continued)
Pin
Pin Name
No.
19 Green Output
20 Red Output
21 Blue Output
Schematic
Description
These are the three video output pins. They are
intended to drive the LM246x family of cathode
drivers. Nominally, about 2V peak to peak will
produce 40V peak to peak of cathode drive.
22 ABL
23 CLAMP
24 H Flyback
The Automatic Beam Limiter input is biased to
the desired beam current limit by RABL and VBB
and normally keeps DINT forward biased. When
the current resupplying the CRT capacitance
(averaged by CABL) exceeds this limit, then DINT
begins to turn off and the voltage at pin 22
begins to drop. The LM1247 then lowers the
gain of the three video channels until the beam
current reaches an equilibrium value.
This pin accepts either TTL or CMOS logic
levels. The internal switching threshold is
approximately one-half of VCC. An external
series resistor, R31, of about 1K is
recommended to avoid overdriving the input
devices. In any event, REXT must be large
enough to prevent the voltage at pin 23 from
going higher than VCC or below GND.
Proper operation requires current reversal. RH
should be large enough to limit the peak current
at pin 24 to about +4 ma during blanking, and
−500 µA during scan. C17 is usually needed for
logic level inputs and should be large enough to
make the time constant, RHC17 significantly
larger than the horizontal period. R34 and C8 are
typically 300Ω and 330 pF when the flyback
waveform has ringing and needs filtering. C18
may be needed to filter extraneous noise and
can be up to 100 pF.
11 www.national.com
11 Page | ||
| Páginas | Total 48 Páginas | |
| PDF Descargar | [ Datasheet LM1247.PDF ] | |
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