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ADEBC2808 Schematic ( PDF Datasheet ) - A-Data Technology

Teilenummer ADEBC2808
Beschreibung PC-133 SDRAM Unbuffered SO-DIMM
Hersteller A-Data Technology
Logo A-Data Technology Logo 




Gesamt 9 Seiten
ADEBC2808 Datasheet, Funktion
A-Data
ADEBC2808
PC-133 SDRAM Unbuffered SO-DIMM
www.DataSheet4U.com
32Mx64bits SDRAM DIMM based on 16Mx16, 4Bank, 8K Refresh, 3.3V SDRAM
General Description
Features
The ADEBC2808 is 32Mx64 bits Synchronous DRAM
Modules, The modules are composed of eight
16Mx16 bits CMOS Synchronous DRAMs in TSOP-II
400mil 54pin package and one 2Kbit EEPROM in 8pin
TSSOP(TSOP) package on a 144pin glass–epoxy
PC-133 support
Auto refresh and self refresh
8192 refresh cycles / 64ms
Single 3.3±0.3V power supply
All device pins are compatible with LVTTL
printed circuit board.
The A-Data is a Dual In-line Memory Module and is
intended for mounting onto 144-pins edge connector
sockets. Fully synchronous operation referenced to
the positive edge of the clock. All inputs and outputs
interface
Data mask function by DQM
Serial Presence Detect with EEPROM
Module bank : two physical bank
PCB : BSS960,Height (31.75mm),double
are synchronized with the rising edge of the clock.
sided component, Six layers
The data paths are internally pipelined to achieve very
high bandwidth.
Ordering Information.
Part No.
ADEBC2808
Frequency
133Mhz
Bank
4 Banks
Ref.
8K
Package
TSOP II
Pin Assignment
FRONT SIDE
BACK SIDE
PIN NAME PIN NAME PIN NAME PIN NAME PIN NAME PIN NAME PIN NAME PIN NAME
1 VSS 19 DQ7 37 DQ8 55 VSS 73 NC 91 VSS 109 A9 127 DQ27
2 VSS 20 DQ39 38 DQ40 56 VSS 74 CK1 92 VSS 110 BA1 128 DQ59
3 DQ0 21 VSS 39 DQ9 57 NC 75 VSS 93 DQ20 111 A10/AP 129 VDD
4 DQ32 22 VSS 40 DQ41 58 NC 76 VSS 94 DQ52 112 A11 130 VDD
5 DQ1 23 DQM0 41 DQ10 59 NC 77 NC 95 DQ21 113 VDD 131 DQ28
6 DQ33 24 DQM4 42 DQ42 60 NC 78 NC 96 DQ53 114 VDD 132 DQ60
7 DQ2 25 DQM1 43 DQ11 61 CK0 79 NC 97 DQ22 115 DQM2 133 DQ29
8 DQ34 26 DQM5 44 DQ43 62 CKE0 80 NC 98 DQ54 116 DQM6 134 DQ61
9 DQ3 27 VDD 45 VDD 63 VDD 81 VDD 99 DQ23 117 DQM3 135 DQ30
10 DQ35 28 VDD 46 VDD 64 VDD 82 VDD 100 DQ55 118 DQM7 136 DQ62
11 VDD 29 A0 47 DQ12 65 /RAS 83 DQ16 101 VDD 119 VSS 137 DQ31
12 VDD 30 A3 48 DQ44 66 /CAS 84 DQ48 102 VDD 120 VSS 138 DQ63
13 DQ4 31 A1 49 DQ13 67 /WE 85 DQ17 103 A6 121 DQ24 139 VSS
14 DQ36 32 A4 50 DQ45 68 CKE1 83 DQ49 104 A7 122 DQ56 140 VSS
15 DQ5 33 A2 51 DQ14 69 /CS0 87 DQ18 105 A8 123 DQ25 141 **SDA
16 DQ37 34 A5 52 DQ46 70 A12 88 DQ50 106 BA0 124 DQ57 142 **SCL
17 DQ6 35 VSS 53 DQ15 71 /CS1 89 DQ19 107 VSS 125 DQ26 143 VDD
18 DQ38 36 VSS 54 DQ47 72 *A13 90 DQ51 108 VSS 126 DQ58 144 VDD
* These pins are not used in this module.
** These pins should be NC in the system which does not support SPD.
Rev 1 April, 2001
1






ADEBC2808 Datasheet, Funktion
A-Data
ADEBC2808
www.DataSheet4U.com
DC Characteristics II
Parameter
Symbol
Test condition
Speed
Unit Note
Burst length=1, One bank active
Operating Current IDD1
700 mA 1
tRCtRC(min),IOL=0mA
Precharge standby
current in power
down mode
IDD2P CKEVIL(max), tCK=min
IDD2PS CKEVIL(max), tCK=
16
mA
16
CKEVIH(min), /CSVIH(min),
tCK=min input signals are
Precharge standby IDD2N changed one time during 2clks.
160
current in Non power
All other pins VDD-0.2V or
mA
down mode
0.2V
CKEVIH(min), tCK=
IDD2NS
Input signals are stable.
800
Active standby
current in power
down mode
IDD3P CKEVIL(max), tCK=min
IDD3PS CKEVIL(max), tCK=
60
mA
60
CKEVIH(min), /CSVIH(min),
tCK=min input signals are
Active standby
IDD3N changed one time during 2clks.
320
current in Non power
All other pins VDD-0.2V or
mA
down mode
0.2V
CKEVIH(min), tCK=
IDD3NS
Input signals are stable.
320
Burst mode operating
IDD4
current
tCKtCK(min),IOL=0 mA
All banks active
800 mA 1
Auto refresh current IDD5
tRRCtRRC(min), All banks
active
1920
mA 2
Self refresh current IDD6 CKE0.2V
16 mA
Note: 1. IDD1 and IDD4 depend on output loading and cycle rates. Specified values are measured with the output
open.
2. Min. of tRRC is shown at AC characteristics.
Rev 1 April, 2001
6

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