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PDF ISL6334 Data sheet ( Hoja de datos )
| Número de pieza | ISL6334 | |
| Descripción | 4-Phase PWM Controller | |
| Fabricantes | Intersil Corporation | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de ISL6334 (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
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ISL6334, ISL6334A
®
www.DataSheet4U.com
Data Sheet
February 26, 2008
FN6482.0
VR11.1, 4-Phase PWM Controller with
Light Load Efficiency Enhancement and
Load Current Monitoring Features
The ISL6334, ISL6334A control microprocessor core voltage
regulation by driving up to 4 interleaved synchronous-rectified
buck channels in parallel. This multiphase architecture results
in multiplying channel ripple frequency and reducing input and
output ripple currents. Lower ripple results in fewer
components, lower cost, reduced power dissipation, and
smaller implementation area.
Microprocessor loads can generate load transients with
extremely fast edge rates and requires high efficiency at light
load. The ISL6334, ISL6334A utilizes Intersil’s proprietary
Active Pulse Positioning (APP), Adaptive Phase Alignment
(APA) modulation scheme, active phase adding and
dropping to achieve and maintain the extremely fast
transient response with fewer output capacitors and high
efficiency from light to full load.
The ISL6334, ISL6334A is designed to be completely
compliant with Intel VR11.1 specifications. It accurately
reports the load current via IMON pin to the microprocessor,
which sends an active low PSI# signal to the controller at low
power mode. The controller then enters 1- or 2-phase
operation with diode emulation option to reduce magnetic
core and switching losses, yielding high efficiency at light
load. After the PSI# signal is de-asserted, the dropped
phase(s) are added back to sustain heavy load transient
response and efficiency.
Today’s microprocessors require a tightly regulated output
voltage position versus load current (droop). The ISL6334,
ISL6334A senses the output current continuously by utilizing
patented techniques to measure the voltage across the
dedicated current sense resistor or the DCR of the output
inductor. The sensed current flows out of FB pin to develop the
precision voltage drop across the feedback resistor for droop
control. Current sensing circuits also provide the needed
signals for channel-current balancing, average overcurrent
protection and individual phase current limiting. An NTC
thermistor’s temperature is sensed via TM pin and internally
digitized for thermal monitoring and for integrated thermal
compensation of the current sense elements.
A unity gain, differential amplifier is provided for remote voltage
sensing and completely eliminates any potential difference
between remote and local grounds. This improves regulation
and protection accuracy. The threshold-sensitive enable input is
available to accurately coordinate the start-up of the ISL6334,
ISL6334A with any other voltage rail. Dynamic-VID™
technology allows seamless on-the-fly VID changes. The
offset pin allows accurate voltage offset settings that are
independent of VID setting.
Features
• Intel VR11.1 Compliant
• Proprietary Active Pulse Positioning (APP) and Adaptive
Phase Alignment (APA) Modulation Scheme
• Proprietary Active Phase Adding and Dropping with Diode
Emulation Scheme For High Light Load Efficiency
• Precision Multiphase Core Voltage Regulation
- Differential Remote Voltage Sensing
- ±0.5% Closed-loop System Accuracy Over Load, Line
and Temperature
- Bi-directional, Adjustable Reference-Voltage Offset
• Precision resistor or DCR Differential Current Sensing
- Accurate Load-Line (Droop) Programming
- Accurate Channel-Current Balancing
- Accurate Load Current Monitoring via IMON Pin
• Microprocessor Voltage Identification Input
- Dynamic VID™ Technology for VR11.1 Requirement
- 8-Bit VID, VR11 Compatible
• Average Overcurrent Protection and Channel Current Limit
• Precision Overcurrent Protection on IMON Pin
• Thermal Monitoring and Overvoltage Protection
• Integrated Programmable Temperature Compensation
• Integrated Open Sense Line Protection
• 1- to 4-Phase Operation, Coupled Inductor Compatibility
• Adjustable Switching Frequency up to 1MHz Per Phase
• Package Option
- QFN Compliant to JEDEC PUB95 MO-220 QFN - Quad
Flat No Leads - Product Outline
• Pb-Free (RoHS Compliant)
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2008. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
1 page  
ISL6334, ISL6334A
Typical Application: 4-Phase VR with Integrated Thermal Compensation, PSI# (DE and GVOT)
www.DataSheet4U.com
+12V
PVCC
BOOT
VIN
+5V
VTT
VR_RDY
VID7
VID6
VID5
VID4
VID3
VID2
VID1
VID0
PSI#
VR_FAN
VR_HOT
VIN
FB COMP VCC DAC
REF
VDIFF
VSEN
RGND
EN_VTT
PWM1
ISEN1-
ISEN1+
ISISLL6633334 4
PWM2
ISEN2-
ISEN2+
PWM3
ISEN3-
ISEN3+
EN_PWR
+5V GND
IMON
TCOMP
PWM4
ISEN4-
ISEN4+
TM OFS FS SS
+5V +5V
NTC
NTC: NTHS0805N02N6801,
6.8kΩ, VISHAY
VCC
PWM
ISL6622
DRIVER
UGATE
PHASE
LGATE
GND
+12V
PVCC
BOOT
VCC
PWM
ISL6612
DRIVER
UGATE
PHASE
LGATE
GND
VIN
+12V
PVCC
BOOT
VCC
PWM
ISL6612
DRIVER
UGATE
PHASE
LGATE
GND
VIN
+12V
PVCC
BOOT
VCC
PWM
ISL6612
DRIVER
UGATE
PHASE
LGATE
GND
VIN
µP
LOAD
5 FN6482.0
February 26, 2008
5 Page 
ISL6334, ISL6334A
Functional Pin Description
VCC - Supplies the power necessary to operate the chip.
Thwewcwo.nDtarotallSehresetat4rUts.ctoomoperate when the voltage on this pin
exceeds the rising POR threshold and shuts down when the
voltage on this pin drops below the falling POR threshold.
Connect this pin directly to a +5V supply.
GND - Bias and reference ground for the IC. The bottom
metal base of ISL6334, ISL6334A is the GND.
EN_PWR - This pin is a threshold-sensitive enable input for
the controller. Connecting the 12V supply to EN_PWR
through an appropriate resistor divider provides a means to
synchronize power-up of the controller and the MOSFET
driver ICs. When EN_PWR is driven above 0.875V, the
ISL6334, ISL6334A is active depending on status of the
EN_VTT, the internal POR, and pending fault states. Driving
EN_PWR below 0.745V will clear all fault states and prime
the ISL6334, ISL6334A to soft-start when re-enabled.
EN_VTT - This pin is another threshold-sensitive enable
input for the controller. It’s typically connected to VTT output
of VTT voltage regulator in the computer mother board.
When EN_VTT is driven above 0.875V, the ISL6334,
ISL6334A is active depending on status of the EN_PWR, the
internal POR, and pending fault states. Driving EN_VTT
below 0.745V will clear all fault states and prime the
ISL6334, ISL6334A to soft-start when re-enabled.
VDIFF, VSEN and RGND - VSEN and RGND form the
precision differential remote-sense amplifier. This amplifier
converts the differential voltage of the remote output to a
single-ended voltage referenced to local ground. VDIFF is
the amplifier’s output and the input to the regulation and
protection circuitry. Connect VSEN and RGND to the sense
pins of the remote load.
FB and COMP - Inverting input and output of the error
amplifier respectively. FB can be connected to VDIFF
through a resistor. A properly chosen resistor between
VDIFF and FB can set the load line (droop), because the
sensed current will flow out of FB pin. The droop scale factor
is set by the ratio of the ISEN resistors and the inductor DCR
or the dedicated current sense resistor. COMP is tied back to
FB through an external R-C network to compensate the
regulator.
DAC and REF - The DAC pin is the output of the precision
internal DAC reference. The REF pin is the positive input of
the Error Amplifier. In typical applications, a 1kΩ, 1% resistor
is used between DAC and REF to generate a precision
offset voltage. This voltage is proportional to the offset
current determined by the offset resistor from OFS to ground
or VCC. A capacitor is used between REF and ground to
smooth the voltage transition during Dynamic VID™
operations.
VR_RDY - VR_RDY indicates that soft-start has completed
and the output voltage is within the regulated range around
VID setting. It is an open-drain logic output. When OCP or
OVP occurs, VR_RDY will be pulled to low. It will also be
pulled low if the output voltage is below the undervoltage
threshold.
OFS - The OFS pin can be used to program a DC offset
current, which will generate a DC offset voltage between the
REF and DAC pins. The offset current is generated via an
external resistor and precision internal voltage references.
The polarity of the offset is selected by connecting the
resistor to GND or VCC. For no offset, the OFS pin should
be left unterminated.
TCOMP - Temperature compensation scaling input. The
voltage sensed on the TM pin is utilized as the temperature
input to adjust IDROOP and the overcurrent protection limit to
effectively compensate for the temperature coefficient of the
current sense element. To implement the integrated
temperature compensation, a resistor divider circuit is needed
with one resistor being connected from TCOMP to VCC of the
controller and another resistor being connected from TCOMP
to GND. Changing the ratio of the resistor values will set the
gain of the integrated thermal compensation. When integrated
temperature compensation function is not used, connect
TCOMP to GND.
TM - TM is an input pin for the VR temperature measurement.
Connect this pin through an NTC thermistor to GND and a
resistor to VCC of the controller. The voltage at this pin is
reverse proportional to the VR temperature. The ISL6334,
ISL6334A monitors the VR temperature based on the voltage
at the TM pin and outputs VR_HOT and VR_FAN signals.
VR_HOT - VR_HOT is used as an indication of high VR
temperature. It is an open-drain logic output. It will be pulled
low if the measured VR temperature is less than a certain
level, and open when the measured VR temperature
reaches a certain level. A external pull-up resistor is needed.
VR_FAN - VR_FAN is an output pin with open-drain logic
output. It will be pulled low if the measured VR temperature
is less than a certain level, and open when the measured VR
temperature reaches a certain level. A external pull-up
resistor is needed.
PWM1, PWM2, PWM3, PWM4 - Pulse width modulation
outputs. Connect these pins to the PWM input pins of the
Intersil driver IC. The number of active channels is
determined by the state of PWM2, PWM3 and PWM4. Tie
PWM2 to VCC to configure for 1-phase operation. Tie
PWM3 to VCC to configure for 2-phase operation. Tie
PWM4 to VCC to configure for 3-phase operation. In
addition, tie PSI# to GND to configure for single phase
operation with diode emulation.
ISEN1+, ISEN1-; ISEN2+, ISEN2-; ISEN3+, ISEN3-;
ISEN4+, ISEN4- - The ISEN+ and ISEN- pins are current
sense inputs to individual differential amplifiers. The sensed
current is used for channel current balancing, overcurrent
11 FN6482.0
February 26, 2008
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet ISL6334.PDF ] | |
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