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PDF SMM150 Data sheet ( Hoja de datos )

Número de pieza SMM150
Descripción Single-Channel Supply Voltage Marginer/Monitor
Fabricantes Summit Microelectronics 
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SMM150
Single-Channel Supply Voltage Marginer/Monitor
Preliminary Information 1 (See Last Page)
FEATURES
INTRODUCTION
Capable of margining supplies with trim inputs
using either positive or negative trim pin control
Wide Margin range from 0.3V to VDD using
internal reference
10-bit ADC readout of supply voltage over I2C bus
Margining Controlled Via:
I2C Command
www.DataSheet4U.com Input Pins (MUP, MDN)
Two programmable general purpose sensor inputs
(COMP1/2) – UV/OV with FAULT Output
Programmable glitch filter (COMP1/2)
Programmable internal VREF, 0.5V or 1.25V
Operates from 2.7V to 5.5V supply
General Purpose 256-Byte EEPROM with Write
Protect
I2C 2-wire serial bus for programming
configuration and monitoring status
28 lead QFN
20 ball Ultra CSPTM (Chip-Scale) package
Applications
In-system test and control of Point-of-Load (POL)
Power Supplies for Multi-voltage Processors,
DSPs and ASICs
Routers, Servers, Storage Area Networks
SIMPLIFIED APPLICATIONS DRAWING
2.7V-5.5V
The SMM150 is a highly accurate power supply
voltage supervisor and environmental monitor with
provisions for voltage margining of the monitored supply.
The part includes an internal voltage reference to
accurately monitor and margin the supply to within ±1%.
The SMM150 has the capability to margin over a wide
range from 0.3V to VDD using the internal reference and
can read the value of the supply over the I2C bus using
an on-chip 10-bit ADC. The monitor and margin levels
are set using the I2C serial bus. The SMM150 initiates
margining via the I2C bus or by using the MUP or MDN
inputs. Once the pre-programmed margin target voltage
is reached, the SMM150 holds the converter at this
voltage until receiving an I2C command or de-asserting
the margin input pin. When the SMM150 is not
margining, the TRIM output pin is held in a high
impedance state allowing the converter to operate at its
nominal set point. Two general purpose input pins are
provided for sensing under or overvoltage conditions. A
programmable glitch filter associated with these inputs
allows the user to ignore spurious noise signals. A
FAULT# pin is asserted once either input set point is
exceeded.
Using the I2C interface, a host system can communicate
with the SMM150 status register and utilize 256-bytes of
nonvolatile memory.
Margin
Commands
MUP
MDN
VDD
GND
VDD_CAP
COMP1
V1
Status
Outputs
I2C
Interface
FAULT#
READY
SDA
SCL
A0
A1
A2
WP
SMM150
COMP2
TRIM
CAPM
VM
TRIM
VOUT+
SEN+
DC-DC Converter
Figure 1 – Applications using the SMM150 Controller to control the Voltage Margining of a DC/DC Converter.
Note: This is an applications example only. Some components and values are not shown.
© SUMMIT Microelectronics, Inc. 2005 • 1717 Fox Drive • San Jose CA 95131 • Phone 408 436-9890 • FAX 408 436-9897
2075 2.6 05/13/05
www.summitmicro.com
1

1 page




SMM150 pdf
SMM150
Preliminary Information
ABSOLUTE MAXIMUM RATINGS
Temperature Under Bias ...................... -55°C to 125°C
Storage Temperature QFN ................... -65°C to 150°C
Terminal Voltage with Respect to GND:
VDD Supply Voltage ..........................-0.3V to 6.0V
All Others ................................-0.3V to VDD + 0.7V
FAULT#…………………………….… GND to 15.0V
Output Short Circuit Current ............................... 100mA
Reflow Solder Temperature (10 secs)….………....240°C
www.DataShJEeueStn4DcUt.RicooanmtiTnegmppeer rJaEtuDrEe.C..…....…....…...…....…...…....…………....…...…….....2105000°VC
Latch-Up testing per JEDEC………..……......…±100mA
Note - The device is not guaranteed to function outside its operating
rating. Stresses listed under Absolute Maximum Ratings may cause
permanent damage to the device. These are stress ratings only and
functional operation of the device at these or any other conditions
outside those listed in the operational sections of the specification is
not implied. Exposure to any absolute maximum rating for extended
periods may affect device performance and reliability. Devices are
ESD sensitive. Handling precautions are recommended.
DC OPERATING CHARACTERISTICS
RECOMMENDED OPERATING CONDITIONS
Temperature Range (Industrial) .......... –40°C to +85°C
(Commercial).............. 0°C to +70°C
VDD Supply Voltage.................................. 2.7V to 5.5V
Inputs.........................................................GND to VDD
Package
28 Pad
TQhFeNrm…a…l R…e…sis…ta.n…ce…(…θJA…) ………….…80oC/W
20 Ball Ultra CSPTM………..………….…….…TBDoC/W
Moisture Classification Level 1 (MSL 1) per J-STD- 020
RELIABILITY CHARACTERISTICS
Data Retention……………………………..…..100 Years
Endurance……………………….……….100,000 Cycles
(Over recommended operating conditions, unless otherwise noted. All voltages are relative to GND.)
Symbol
Parameter
Notes
Min.
Typ.
Max Unit
VDD
Supply Voltage
2.7 3.3 5.5 V
VM Positive Sense Voltage VM pin
0.3
VDD
V
IDD
Power Supply Current from
VDD
TRIM pin floating
3 mA
ITRIM
TRIM output current through TRIM Sourcing Max Current
100to 1.0V
TRIM Sinking Max Current
1.5 mA
-1.5 mA
VTRIM
VADOC
TRIM output voltage range
Margin Range
ITRIM ±1.5mA
Depends on Trim range of DC-
DC Converter
GND
0.3
2.5
VDD
V
V
VIH
Input High Voltage
SDA,SCL,WP,MUP,MDN
VDD = 2.7V
VDD = 5.0V
0.9xVDD
0.7xVDD
VDD
VDD
V
VIL
Input Low Voltage
SDA,SCL,WP,MUP,MDN
VDD = 2.7V
VDD = 5.0V
0.1xVDD
0.3xVDD
V
VOL
Open Drain Output
FAULT#, READY
ISINK = 1mA
0.2 V
VAIH
Address Input High Voltage, VDD = 2.7V, Rpullup300k
A2, A1, A0
VDD = 5.0V, Rpullup300k
VAIL
Address Input Low Voltage, VDD = 2.7V, Rpulldown300k
A2, A1, A0
VDD = 5.0V, Rpulldown300k
IAIT
Address Input Tristate
VDD = 2.7V
Maximum Leakage – High Z VDD = 5.0V
0.9xVDD
0.7xVDD
-1.8
-2.0
VDD
VDD
0.1xVDD
0.3xVDD
+1.4
+1.6
V
V
µA
OV/UV Monitor Voltage Range
COMP1 and COMP2 pins
0
VDD
V
VHYST
RPull-Up
COMP1/2 DC Hysteresis
Input Pull-Up Resistors
COMP1 and COMP2 pins,
VTH-VTL (see Note 1)
See Pin Descriptions
10 mV
50 k
Note 1 – The Base DC Hysteresis voltage is measured with a 1.25V external voltage source. The resulting value is determined by subtracting
Threshold Low from Threshold High, VTH-VTL while monitoring the FAULT# pin state. Base DC Hysteresis is measured with a 1.25V input. Actual DC
Hysteresis is derived from the equation: (VIN/VREF)(Base Hysteresis). For example, if VIN=2.5V and VREF=1.25V then Actual DC Hysteresis=
(2.5V/1.25V)(0.003V)=6mV.
Summit Microelectronics, Inc
2075 2.6 05/13/05
5

5 Page





SMM150 arduino
APPLICATIONS INFORMATION (CONTINUED)
SMM150
Preliminary Information
Fault Latched by a Fault Condition:
The “Fault Latched by a Fault Condition”
programmable option is triggered only on the leading
edge of a Fault. That is, a latched fault can be cleared
while the Fault yet exists.
Fault Latched by Ready I/O Pin:
www.DataShFeeatu4Ult.cLomatched by Ready I/O pin functions on the
margin transitions from Off to Hi/Low/Nominal or from
Nominal to Hi/Low or Hi/Low to Nominal but not from
Hi/Low/Nominal to Off.
WRITE PROTECTION
Write protection for the SMM150 is located in a volatile
register where the power-on state is defaulted to write
protect. There are separate write protect modes for the
configuration registers and memory. In order to
remove write protection, the code 55HEX is written to
the write protection register.
Other codes will enable write protection. For example,
writing 59HEX will allow writes to the configuration
register but not to the memory, while writing 35HEX will
allow writes to the memory but not to the configuration
registers. The SMM150 also features a Write Protect
pin (WP input) which, when asserted, prevents writing
to the configuration registers and EE memory. In
addition to these two forms of write protection there is
a configuration register lock bit which, once
programmed, does not allow the configuration
registers to be changed.
A2, A1, A0
The address bits A[2:0] can be hard wired High or Low
or may be left open (High-Z) to allow for a total of 21
distinct device addresses. When floating, the inputs
can tolerate the amount of leakage as described by
the specification IAIT. An external 100k pull-up or pull
down resistor is sufficient to set a High or Low logic
level.
+VIN - 2.7V to 5.5V
MDN
MUP
Vdd J2
1
2
1
2
D1
DIODE
Programming Supply
J1
1
3
5
7
9
Gnd SCL
Gnd3 SDA
Rsrv5 MR
+10V Rsrv8
+5V Rsrv10
2
4
6
8
10
I2C SMX3200 Connector
Vdd
U3
25
24
MDN
MUP
READY
FAULT#
C1
0.01uF
COMP1 19
C2
0.1uF
R3
20
C3
10uF
C8
0.1uF
COMP2 12
SMM1501
28
8
SCL
SDA
WP
6
4
2
A0
A1
A2
7 GND
VM 14
TRIM 20
CAP_M 10
C4
0.02uF
C10
0.1uF
R4 2.5k
C6
0.01uF
C5
1uF
R5
R6
U2 DC-DC Converter
7
8
11
9
+Vin
+Vin
Enable
+Vin
C9
0.01uF
+Vout
+Vout
+Vout
Sense
Trim
1
2
4
3
10
VOUT = 1.5V
R7
R8
C7
0.01uF
Figure 6 – Typical applications schematic which shows the SMM150 controlling a 3.3V in/1.5V out DC/DC
converter. Care should be taken to filter DC/DC converter noise from the SMM150 VDD supply pin. This is
accomplished with optional components R3, C1, C2, C3 and C10. This example, using a 1.25V VREF, also
shows the COMP1/2 pins monitoring the DC/DC converter VOUT set to an OV of 1.7V on COMP1 and a UV of
1.3V on COMP2, the voltage divider resistors are:
For OV, R5 = 1.37k, 1% R6 = 3.83k, 1%, For UV, R7= 1.02k, 1% R8 = 25.5k, 1%.
The jumper J2 can be used to supply the SMM150 VDD voltage from the SMX3200 programmer when the
device is programmed with board power off and the controlled supply unloaded.
Summit Microelectronics, Inc
2075 2.6 05/13/05
11

11 Page







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