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R8A66162SP Schematic ( PDF Datasheet ) - Renesas Technology

Teilenummer R8A66162SP
Beschreibung 32-BIT LED DRIVER
Hersteller Renesas Technology
Logo Renesas Technology Logo 




Gesamt 8 Seiten
R8A66162SP Datasheet, Funktion
R8A66162SP
32-BIT LED DRIVER WITH SHIFT REGISTER AND LATCH
REJ03F0263-0100
Rev. 1.00
Jan. 24. 2008
DESCRIPTION
The R8A66162SP is a semiconductor integrated circuit for LED array driver with 32-bit serial-input, parallel -
output shift register, equipped with direct set input and output latches.
The R8A66162SP guarantees sufficient 24mA (Vcc=5.0V case) output current to drive anode common LED,
allowing 32-bit simultaneous and continuous current output. The parallel outputs are open-drain outputs.
In addition, as this product has been designed in complete CMOS, power consumption can be greatly
reduced when compared with conventional BIPOLAR or Bi-CMOS products. Furthermore, pin layout ensures
the realization of an easy printed circuit. R8A66162SP is the succession product of M66313FP.
www.DataSheetF4UE.coAmTURES
Anode common LED drive
VCC 5V or 3.3V single power supply
High output current: All parallel outputs Q1~Q32 IOL=24mA (at VCC=5.0V), IOL=12mA (at VCC=3.3V),
LEDs can be turned on simultaneously.
Low power dissipation: 200uW/package (max) (VCC=5.0V, Ta=25OC, quiescent state)
High noise margin: Employment of Schmitt-trigger circuit on all inputs allows application with long wiring.
Direct set input (SD)
Open-drain output (Q1~Q32)
Serial data output for cascading (SQ32)
Wide operating temperature range (Ta=-40oC~+85oC)
Pin configuration for easy layout on PCB. (Pin configuration allows easy cascade connection or LED
connection)
APPLICATION
LED array drive, The various LED display modules
PPC, Printer, VCR, Mini-compo, Button-Telephone etc. All of LED display equipments
BLOCK DIAGRAM
LOGIC DIAGRAM
PARALLEL DATA OUTPUTS
Q1 Q2 Q3 Q4
234 5
SERIAL DATA
OUTPUT
Q29 Q30 Q31 Q32 SQ32
20 21 22 23 17
Vcc
9 15 37
0
LE
DS
0
LE
DS
0
LE
DS
0
LE
DS
1
CK
DS
1
CK
DS
1
CK
DS
1
CK
DS
0
LE
DS
0
LE
DS
0
LE
DS
0
LE
DS
1
CK
DS
1
CK
DS
1
CK
DS
1
CK
DS
11 10
OE A
DATA
SIGNAL
OUTPUT SERIAL OE
ENABLE DATA SIGNAL
INPUT INPUT
PARALLEL
DATA
OUTPUTS
Q1 Q32
OUTPUT FORMAT
SERIAL
DATA
OUTPUT
SQ32
1 8 16 24
14 13 12
30 36 43
CK SD LE GND
SHIFT DIRECT LATCH
CLOCK SET ENABLE
INPUT INPUT INPUT
REJ03F0263-0100 Rev.1.00 Jan.24.2008
page 1 of 7






R8A66162SP Datasheet, Funktion
R8A66162SP
TIMING DIAGRAM
CK
SQ32
www.DataSheet4U.com
Q1 Q32
tw tw
50%
50%
tPLH
50%
tPLZ
10%
50%
tPHL
VCC
GND
50%
tPZL
VOH
VOL
VCC
50%
VOL
LE
Q1 Q32
Q1 Q32
tw
50%
tPZL
50%
tPLZ
10%
VCC
50%
GND
VCC
VOL
VCC
VOL
SD
CK
SQ32
Q1 Q32
tw
50%
50%
trec
tPLH
50%
tPZL
50%
50%
VCC
GND
VCC
GND
VOH
VOL
VCC
VOL
A
CK
50%
50%
tsu th
50%
VCC
GND
VCC
GND
OE
Q1 Q32
50%
tPZL
50%
50%
tPLZ
10%
VCC
GND
VCC
VOL
LE
CK
Q1 Q32
th
50%
50%
VCC
GND
VCC
GND
VCC
VOL
REJ03F0263-0100 Rev.1.00 Jan.24.2008
page 6 of 7

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