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TMP19A71FYUG Schematic ( PDF Datasheet ) - Toshiba Semiconductor

Teilenummer TMP19A71FYUG
Beschreibung 32-Bit RISC Microprocessor
Hersteller Toshiba Semiconductor
Logo Toshiba Semiconductor Logo 




Gesamt 30 Seiten
TMP19A71FYUG Datasheet, Funktion
www.DataSheet4U.com
32 bit TX System RISC
TX19 Family
TMP19A71CYFGUG
TMP19A71FYFGUG
Rev 2.0Feb.2007






TMP19A71FYUG Datasheet, Funktion
TMP19A71
www.DataSheet4U.com
TX19A Proccessor Core
TX19A CPU
EJTAG
NMI (P95)
INT0 (P84)
INT1 (PA7)
INT2 (PB7)
INT3 (P64)
INT4 (P65)
INT5 (P66)
INT6 (P67)
INT7 (P70)
INT8 (P71)
INT9 (P72)
U0 (PA0)
X0 (PA1)
V0 (PA2)
Y0 (PA3)
W0 (PA4)
Z0 (PA5)
EMG0 (PA6)
U1 (PB0)
X1 (PB1)
V1 (PB2)
Y1 (PB3)
W1 (PB4)
Z1 (PB5)
EMG1 (PB6)
ENCA (P90)
ENCB (P91)
ENCZ (P92)
TXD0 (P80)
RXD0 (P81)
TXD1 (P82)
RXD1 (P83)
TXD2 (P86)
RXD2 (P85)
SCLK2/CTS2 (P87)
TXD3 (P91)
RXD3 (P90)
SCLK3/CTS3 (P92)
TB0IN (P93),
TB1IN (P70),
TB2IN (P71),
TB3IN (P72),
TB0OUT (P94)
TB1OUT (P87)
TB2OUT (PA7)
TB3OUT (PB7)
256KB MaskROM
256KB FlashROM
10 KBRAM
ROM correction
DMAC (8ch)
CG
INTC
PMD0
PMD1
IMBusI/F
PORT0
PORT1
ENC
UART0
UART1
UART2/
SIO2
UART3/
SIO3
16-bit TMR0-3
(4ch)
EJTAG
PORT
10-bit ADC0
10-bit ADC1
WDT
( ): Default function after reset
Figure 1.1 TMP19A71 Block Diagram
TMP19A71 1-4
X1
X2
RESET
TEST0/1
EJE
P00P07
P10P17
TCK (P20)
TMS (P21)
TDI (P22)
TDO (P23)
DINT (P24)
TPC (P30)
PCST0 (P31)
PCST1 (P32)
PCST2 (P33)
PCST3 (P86)
PCST4 (P87)
DCLK (P34)
AIN07 (P5057)
AVSS
AVCC0/VREFH0
AIN818 (P6072)
AVSS
AVCC1/VREFH1

6 Page









TMP19A71FYUG pdf, datenblatt
TMP19A71
Pin Name
P80
TX0
P81
RX0
P82
TX1
P83
RX1
P84
www.DataSheIeNt4TU0.com
TB1OUT
P85
RX2
P86
TX2
PCST3
P87
SCLK2
CTS2
PCST4
P90
ENCA
RX3
P91
ENCB
TX3
P92
ENCZ
SCLK2
CTS2
P93
TB0IN
P94
TB0OUT
BOOT (Note)
P95
NMI
PA0
U0
PA1
X0
PA2
V0
PA3
Y0
PA4
W0
PA5
Z0
Table 2.3.2 Pin Names and Functions (2/3)
Number
of Pins
Type
Function
1 Input/Output Port 80: Programmable as input or open-drain output
Output Serial Transmit Data 0
1 Input/Output Port 81: Programmable as input or output
Input Serial Receive Data 0
1 Input/Output Port 82: Programmable as input or open-drain output
Output Serial Transmit Data 1
1 Input/Output Port 83: Programmable as input or output
Input Serial Receive Data 1
1 Input/Output Port 84: Programmable as Schmitt-triggered input or output
Input External interrupt pin
Output 16-Bit Timer 1 Output: Output from 16-bit timer 1
1 Input/Output Port 85: Programmable as input or output
Input Serial Receive Data 2
1 Input/Output Port 86: Programmable as input or open-drain output
Output Serial Transmit Data 2
Output EJTAG pin
1 Input/Output Port 87: Programmable as Schmitt-triggered input or open-drain output
Input/Output Serial Clock Input/Output 2
Output Serial Clear-to-Send 2
Output EJTAG pin
1 Input/Output Port 90: Programmable as Schmitt-triggered input or output
Input Encoder A-phase input pin
Input Serial Receive Data 3
1 Input/Output Port 91: Programmable as Schmitt-triggered input or output
Input Encoder B-phase input pin
Output Serial Transmit Data 3
1 Input/Output Port 92: Programmable as Schmitt-triggered input or output
Input Encoder Z-phase input pin
Input/Output Serial Clock Input/Output 3
Output Serial Clear-to-Send 3
1 Input/Output Port 93: Programmable as Schmitt-triggered input or output
Input 16-Bit Timer 0 Input: Input to 16-bit timer 0 and emergency stop input pin
1 Input/Output Port 94: Programmable as input or output
Output 16-Bit Timer 0 Output: Output from 16-bit timer 0
Single boot mode set pin: Should be set to Low to start up in Boot mode.
1 Input/Output Port 95: Programmable as Schmitt-triggered input or output
Input Nonmaskable Interrupt Request: Programmable to be rising-edge or falling edge sensitive
1 Input/Output Port A0: Programmable as input or output
Output PMD0: U-phase output
1 Input/Output Port A1: Programmable as input or output
Output PMD0: X-phase output
1 Input/Output Port A2: Programmable as input or output
Output PMD0: V-phase output
1 Input/Output Port A3: Programmable as input or output
Output PMD0: Y-phase output
1 Input/Output Port A4: Programmable as input or output
Output PMD0: W-phase output
1 Input/Output Port A5: Programmable as input or output
Output PMD0: Z-phase output
TMP19A71 2-6

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