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PDF AD5273 Data sheet ( Hoja de datos )

Número de pieza AD5273
Descripción 64-Position OTP Digital Potentiometer
Fabricantes Analog Devices 
Logotipo Analog Devices Logotipo



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64-Position OTP Digital Potentiometer
AD5273
FEATURES
64 Positions
OTP (One-Time-Programmable)1 Set-and-Forget
Resistance Setting
1 k, 10 k, 50 k, 100 kEnd-to-End Terminal Resistance
Compact Standard SOT23-8 Package
Ultralow Power: IDD = 5 A Max
Fast Settling Time: tS = 5 s Typ in Power-Up
www.DataSheet4UI.2cComCompatible Digital Interface
Computer Software2 Replaces C in Factory Programming
Applications
Wide Temperature Range: –40؇C to +105؇C
5 V Programming Voltage
Low Operating Voltage, 2.7 V to 5.5 V
OTP Validation Check Function
APPLICATIONS
Systems Calibrations
Electronics Level Settings
Mechanical Trimmers® Replacement in New Designs
Automotive Electronics Adjustments
Transducer Circuits Adjustments
Programmable Filters up to 6 MHz BW3
GENERAL DESCRIPTION
The AD5273 is a 64-position, One-Time-Programmable (OTP)
digital potentiometer4 that employs fuse link technology to achieve
the permanent program setting. This device performs the same
electronic adjustment function as most mechanical trimmers and
variable resistors. It allows unlimited adjustments before perma-
nently setting the resistance values. The AD5273 is programmed
using a 2-wire, I2C compatible digital control. During the write
mode, a fuse blow command is executed after the final value
is determined, therefore freezing the wiper position at a given
setting (analogous to placing epoxy on a mechanical trimmer).
When this permanent setting is achieved, the value will not change
regardless of the supply variations or environmental stresses under
normal operating conditions. To verify the success of permanent
programming, Analog Devices patterned the OTP validation such
that the fuse status can be discerned from two validation bits in
the read mode.
FUNCTIONAL BLOCK DIAGRAM
SCL
SDA
I2C INTERFACE
AND
CONTROL LOGIC
A
W
A0
AD5273
B
VDD
GND
FUSE
LINK
WIPER
REGISTER
In addition, for applications that program AD5273 at the factory,
Analog Devices offers device programming software2 running in
Windows® NT, 2000, and XP operating systems. This software
application effectively replaces any external I2C controllers, which
in turn enhances users’ systems time-to-market.
AD5273 is available in 1 k, 10 k, 50 k, and 100 kin
compact SOT23 8-lead standard package and operates from
–40°C to +105°C.
Besides its unique OTP feature, the AD5273 lends itself well to
general digital potentiometer applications due to its effective
resolution, array resistance options, small footprint, and low cost.
An AD5273 evaluation kit and software are available.The kit includes
the connector and cable that can be converted for further factory
programming applications.
For applications that require dynamic adjustment of resistance
settings with nonvolatile EEMEM, users should refer to AD523x
and AD525x families of nonvolatile memory digital potentiometers.
NOTES
1 One-Time-Programmable—Unlimited adjustments before permanent setting.
2 ADI cannot guarantee the software to be 100% compatible in all systems due to
the wide variations in computer configurations.
3 Applies to 1 kparts only.
4The terms digital potentiometer, VR, and RDAC are used interchangeably.
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
that may result from its use. No license is granted by implication or other-
wise under any patent or patent rights of Analog Devices.Trademarks and
registered trademarks are the property of their respective companies.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
www.analog.com
Fax: 781/326-8703 © Analog Devices, Inc., 2002. All rights reserved.

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AD5273 pdf
W1
8A
VDD 2 AD5273 7 B
TOP VIEW
GND 3 (Not to Scale) 6 A0
SCL 4
5 SDA
Pin No.
1
2
www.DataShee3t4U.com
4
5
6
7
8
Mnemonic
W
VDD
GND
SCL
SDA
A0
B
A
PIN FUNCTION DESCRIPTIONS
Description
Wiper Terminal W
Positive Power Supply. Specified for non-OTP operation from 2.7 V to 5.5 V.
For OTP programming, VDD needs to be a minimum of 5 V.
Common Ground
Serial Clock Input. Requires Pull-Up Resistor.
Serial Data Input/Output. Requires Pull-Up Resistor.
I2C Device Address Bit
Resistor Terminal B
Resistor Terminal A
AD5273
REV. 0
–5–

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AD5273 arduino
AD5273
THEORY OF OPERATION
The AD5273 is a One-Time-Programmable (OTP), Set-and-
Forget, 6-bit digital potentiometer. It is comprised of six data
fuses, which control the address decoder for programming the
RDAC, one user mode test fuse for checking setup error, and one
programming lock fuse for disabling any further programming
once the data fuses are programmed correctly.
One-Time-Programming (OTP)
AD5273 has an internal power-on preset that places the wiper
in the midscale during power-on. After the wiper is adjusted to
the desired position, the wiper setting can be permanently pro-
grammed by setting the T bit, MSB of the Instruction Byte, to 1
along with the proper coding. Refer to Table I.
www.DataSheeTt4hUe.coonme-time program control circuit has two validation bits, E1
and E0, that can be read back in the Read mode for checking the
programming status. Table III shows the validation status.
Table III. Validation Status
E1 E0 Status
0 0 Ready for Programming
0 1 Test Fuse Not Blown Successfully (For Setup Checking)
1 0 Fatal Error. Some fuses are not blown. Retry.
1 1 Successful. No further programming is possible.
The detailed programming sequence is explained further below.
When the OTP T bit is set, the internal clock is enabled. The
program will attempt to blow a test fuse. The operation stops if
this fuse is not blown successfully. The validation bits, E1 and E0,
show 01 and the users should check the setup. If the test fuse is
blown successfully, the data fuses will be programmed next. The
six data fuses will be programmed in six clock cycles. The output
of the fuses is compared with the code stored in the DAC regis-
ter. If they do not match, E1 E0 = 10 is issued as a fatal error and
the operation stops. Users may retry with the same code. If the
output and the stored code match, the programming lock fuse
will be blown so that no further programming is possible. In the
meantime, E1 E0 will issue 11 indicating the lock fuse is blown
successfully. All the fuse latches are enabled at power on from this
point on. Figure 2 shows a detailed functional block diagram.
DETERMINING THE VARIABLE RESISTANCE AND
VOLTAGE*
Rheostat Operation
The nominal resistance of the RDAC between terminals A and B
is available in 1 k, 10 k, 50 k, and 100 k.The final two or
three digits of the part number determine the nominal resistance
value, e.g., 1 k= 1, 10 k= 10; 50 k= 50; 100 k= 100.The
nominal resistance (RAB) of the RDAC has 64 contact points
accessed by the wiper terminal, plus the B terminal contact. The
6-bit data in the RDAC latch is decoded to select one of the 64
possible settings. Assuming that a 10 kpart is used, the wiper’s
first connection starts at the B terminal for data 00H. Since there
is a 60 wiper contact resistance, such connection yields a
minimum of 60 resistance between terminals W and B. The
second connection is the first tap point and corresponds to 219
(RWB = RAB/63 + RW = 159 + 60) for data 01H. The third con-
nection is the next tap point representing 378 (159 ϫ 2 + 60)
for data 02H, and so on. Each LSB data value increase moves the
wiper up the resistor ladder until the last tap point is reached at
10060 [RAB + RW]. Figure 3 shows a simplified diagram of the
equivalent RDAC circuit. The general equation determining the
digitally programmed output resistance between W and B is:
( )RWB
D
=
D
63
¥ RAB
+ RW
where:
(1)
D is the decimal equivalent of the binary code loaded in the 6-bit
RDAC register.
RAB is the nominal end-to-end resistance.
RW is the wiper resistance contributed by the on resistance of the
internal switch.
Again, if RAB = 10 kand terminal A is opened, the following
output resistance values RWB will be set for the following RDAC
latch codes.
D(DEC)
63
32
1
0
R WB ()
10060
5139
219
60
Output State
Full-Scale (RAB + RW)
Midscale
1 LSB
Zero-Scale (Wiper contact resistance)
*Applies to Potentiometer Mode only
SCL
SDA
I2C INTERFACE
DAC
REG.
MUX
DECODER
COMPARATOR
ONE TIME
PROGRAM/TEST
CONTROL BLOCK
FUSES
EN
FUSE
REG.
A
W
B
REV. 0
Figure 2. Detailed Functional Block Diagram
–11–

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