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PDF MB90F523B Data sheet ( Hoja de datos )
| Número de pieza | MB90F523B | |
| Descripción | (MB90F5xxB) 16-bit Proprietary Microcontroller | |
| Fabricantes | Fujitsu Media Devices | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de MB90F523B (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
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FUJITSU MICROELECTRONICS
DATA SHEET
DS07-13707-3Ea
16-bit Proprietary Microcontroller
CMOS
F2MC-16LX MB90520A/520B Series
www.DataSheetM4U.coBm 90522A/523A/522B/523B/F523B/V520A
■ DESCRIPTION
The MB90520A/520B series is a general-purpose 16-bit microcontroller designed for process control applications
in consumer products that require high-speed real-time processing.
The microcontroller instruction set is based on the AT architecture of the F2MC* family with additional instructions
for high-level languages, extended addressing modes, enhanced multiplication and division instructions, and a
complete range of bit manipulation instructions. The microcontroller has a 32-bit accumulator for processing long
word (32-bit) data.
The MB90520A/520B series peripheral resources include an 8/10-bit A/D converter, 8-bit D/A converter, UART
(SCI) , extended I/O serial interfaces 0 and 1, 8/16-bit up/down counter/timers 0 and 1, 8/16-bit PPG timers 0 and
1, a range of I/O timers (16-bit free-run timers 1 and 2, input capture (ICU) 0 and 1, and output compare (OCU)
0 and 1) , an LCD controller/driver, 8 external interrupt inputs, and 8 wakeup interrupts.
* : F2MC stands for FUJITSU Flexible MicroController.
■ FEATURES
• Clock
• Internal PLL clock multiplication circuit
• Selectable machine clock (PLL clock) : Base oscillation divided by two or multiplied by one to four
(For a 4 MHz base oscillation, the machine clock range is 4 MHz to 16 MHz) .
(Continued)
■ PACKAGES
120-pin, Plastic, LQFP
120-pin, Plastic, QFP
(FPT-120P-M05)
(FPT-120P-M13)
Copyright©2002-2008 FUJITSU MICROELECTRONICS LIMITED All rights reserved
2002.3
1 page  
MB90520A/520B Series
(Continued)
Parameter
Part
Number MB90522A MB90523A MB90522B MB90523B MB90F523B MB90V520A
Clock timer
8/16-bit PPG timer
15-bit timer
Interrupt interval : 0.438, 0.5, or 2.0 μs for sub-clock frequency = 32.768 kHz
Number of channels : 1 (Can be used in 2 × 8-bit channel mode)
Can generate a pulse waveform output with specified period and 0 to 100% duty ratio.
8/16 -bit up/down
www.DataSheet4cUo.uconmter/timers
Number of channels : 1 (Can be used in 2 × 8-bit channel mode)
External event inputs : 6 channels
Reload/compare function : 8-bit × 2 channels
Clock monitor
Clock output frequency : Machine clock/21 to machine clock/28
Delayed interrupt
generation module
Interrupt generation module for task switching. (Used by REALOS.)
DTP/External
interrupts
Input channels : 8
Generates interrupts to the CPU on rising edges, falling edges with input “H” level, or “L”
level.
Can be used for external event interrupts and to activate EI2OS.
Wakeup interrupts
Input channels : 8
Triggered by “L” level.
8/10-bit A/D converter
(successive
approximation type)
Number of channels : 8
Resolution : 8-bit or 10-bit selectable
Conversion can be performed sequentially for multiple consecutive channels.
• Single-shot conversion mode : Converts specified channel once only.
• Continuous conversion mode : Repeatedly converts specified channel.
• Intermittent conversion mode : Converts specified channel then halts temporarily.
8-bit D/A converter
(R-2R type)
Number of channels : 2
Resolution : 8-bit
UART (SCI)
Number of channels : 1
Clock synchronous transfer : 62.5 Kbps to 1 Mbps
Clock asynchronous transfer : 1202 bps to 31250 bps
Supports bi-directional and master-slave communications.
Extended I/O serial
interface
Number of channels : 2
Clock synchronous transfer : 31.25 Kbps to 1 Mbps (Using internal shift clock)
Transmission format : Selectable LSB-first or MSB-first
LCD controller/driver
Number of common outputs : 4
Number of segment outputs : 32
Number of power supply pins for LCD drive : 4
LCD display memory : 16 bytes
Divider resistor for LCD drive : Internal
*1 : As for the necessity of a DIP switch setting (S2) when using the emulation pod (MB2145-507) .
Refer to the hardware manual for the emulation pod (MB2145-507) fomr details.
*2 : Take note of the maximum operating frequency and A/D converter precision restrictions when operating at 3.0 V
to 3.6 V. See the “Electrical Characteristics” section for details.
5
5 Page 
MB90520A/520B Series
Pin No.
LQFP-120*1
QFP-120*2
16
www.DataSheet4U.com
35
36
37
40, 41
46 to 53
55, 57
Pin Name
Circuit
Type
Function
General-purpose I/O port
P47
The settings in the pull-up resistor setup register (RDR4) are enabled
when ports are set as inputs. The RDR4 settings are ignored when ports
D are set as outputs.
SCK1
Serial clock input/output pin for extended I/O serial interface 1
Only available when serial clock output is enabled for SCK1.
P50 General-purpose I/O port
SIN2
Data input pin for extended I/O serial interface 2
Input operates continuously when the performing serial input.
E Accordingly, output to the pin from other functions that share this pin must
be suspended unless performed intentionally.
AIN1
Also can be used as the count clock A input to 8/16-bit up/down counter/
timer 1.
P51 General-purpose I/O port
SOT2
Data output pin for extended I/O serial interface 2
E Only available when serial data output is enabled for SOT2.
BIN1
Also can be used as the count clock B input to 8/16-bit up/down counter/
timer 1.
P52 General-purpose I/O port
SCK2
Serial clock input/output pin for extended I/O serial interface 2
E Only available when serial clock output is enabled for SCK2.
ZIN1
Also can be used as the control clock Z input to 8/16-bit up/down counter/
timer 1.
P53, P54
DA0, DA1
General-purpose I/O ports
I
Analog output pins for ch.0 and ch.1 of the 8-bit D/A converter
General-purpose I/O ports
P60 to P67
Port input is enabled when the analog input enable register (ADER) is set
AN0 to
AN7
to the ports.
K
Analog inputs for the 8/10-bit A/D converter
Analog input is enabled when the analog input enable register (ADER) is
set.
P70, P72
General-purpose I/O ports
TI0, TI1
Event input pins for 16-bit reload timers 0 and 1
Input operates continuously when 16-bit reload timers 0 and 1 input an
E external clock. Accordingly, output to these pins from other functions that
share the pins must be suspended unless performed intentionally.
OUT4,
OUT6
Event output pins for ch. 4 and ch. 6 of output compare unit 1 (OCU)
Only available when event output from output compare 1 is enabled.
*1 : FPT-120P-M05
*2 : FPT-120P-M13
(Continued)
11
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| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet MB90F523B.PDF ] | |
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