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PDF MB90V440G Data sheet ( Hoja de datos )

Número de pieza MB90V440G
Descripción (MB90F4xxG) 16-bit Proprietary Microcontroller
Fabricantes Fujitsu Media Devices 
Logotipo Fujitsu Media Devices Logotipo



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No Preview Available ! MB90V440G Hoja de datos, Descripción, Manual

FUJITSU SEMICONDUCTOR
DATA SHEET
DS07-13716-2E
16-bit Proprietary Microcontroller
CMOS
F2MC-16LX MB90440G Series
MB90443G/F443G/V440Gwww.DataSheet4U.com
s DESCRIPTION
The MB90440G series with FULL-CAN*2 and FLASH ROM is a line of general-purpose, Fujitsu 16-bit microcon-
trollers specially designed for automotive and industrial applications. Its main features are three on board CAN
Interfaces (generic type) , which conform to V2.0 Part A and Part B, supporting very flexible message buffering.
Thus, more functions than a normal full CAN approach is available.
While inheriting the AT architecture of the F2MC*1 family, the instruction set for the F2MC-16LX CPU core incor-
porates additional instructions for high-level languages, supports extended addressing modes, and contains
enhanced multiplication and division instructions as well as a substantial collection of improved bit manipulation
instructions. In addition, the MB90440G series has as on-chip 32-bit accumulator, which enables processing of
long-word data.
The peripheral resources integrated in the MB90440G series include; an 8/10-bit A/D converter, UARTs (SCI) ,
I/O extended serial interface, 8/16-bit PPG timer, input/output timer (input capture (ICU) , output compare (OCU) ) .
*1 : F2MC stands for FUJITUS Flexible Microcontroller, a registered trademark of FUJITSU LIMITED.
*2 : Controller Area Network (CAN) is a license of Robert Bosch GmbH..
s PACKAGE
100-pin Plastic QFP
FPT-100P-M06

1 page




MB90V440G pdf
MB90440G Series
(Continued)
Part number
Parameter
MB90443G
(under development)
MB90F443G
MB90V440G
16-bit
Input Capture
(8 channels)
Rising edge, falling edge or rising & falling edge sensitive
Four 16-bit capture registers
Signals an interrupt upon external event
8/16-bit
www.DataSheet4PUr.ocogmrammable Pulse
Generator
(4 channels)
Supports 8-bit and 16-bit operation modes
Eight 8-bit reload counters
Eight 8-bit reload registers for L pulse width
Eight 8-bit reload registers for H pulse width
A pair of 8-bit reload counters can be configured as one 16-bit reload counter or as
8-bit prescaler plus 8-bit reload counter
4 output pins
Operation clock frequency. : fsys, fsys/21, fsys/22, fsys/23, fsys/24 or 128 µs@fosc = 4 MHz
(fsys = System clock frequency, fosc = Oscillation clock frequency)
CAN Interface
3 channels :
Conforms to CAN Specification Version 2.0 Part A and B
Automatic re-transmission in case of error
Automatic transmission responding to Remote Frame
Supports prioritized 16 message buffers for data and ID
Flexible configuration of acceptance filtering :
Full bit compare / Full bit mask / Two partial bit masks
Supports up to 1 Mbps
External Interrupt
(8 channels)
Can be programmed edge detection or level detection
External bus interface
The external access used selective 8-bit bus or 16-bit bus is available.
(External bus mode)
I/O Ports
Virtually all external pins can be used as general purpose I/O
All push-pull outputs and schmitt trigger inputs
Bit-wise programmable as input/output or peripheral signal
32 kHz Subclock
Flash
Memory
Sub-clock for low power operation
Supports automatic programming, Embedded AlgorithmTM
Write/Erase/Erase-Suspend/Resume commands
A flag indicating completion of the algorithm
Number of erase cycles : 10,000 times
Data retention time : 10 years
Boot block configuration
Erase can be performed on each block
Block protection with external programming voltage
*1 : Values with conditions such as the operating frequency (See section “ ELECTRICAL CHARACTERISTICS”) .
*2 : DIP switch S2 when using emulation pad MB2145-507.
The details are referred to hardware manual of MB2145-507.
5

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MB90V440G arduino
MB90440G Series
(Continued)
Pin No.
75
76
www.DataSheet4U.com
78
34
37
35
36
49
to 50
51
27
23, 84
11, 42
81
Pin name
P96
TX1
P97
RX1
PA0
INT3
AVCC
AVSS
AVRH
AVRL
MD0
to MD1
MD2
C
VCC
VSS
Circuit type
Function
General I/O port. This function is enabled when CAN1 disables out-
put.
D
TX output pin for CAN1. This function is enabled when CAN1 en-
ables output.
General I/O port. This function is always enabled.
D RX input pin for CAN1 interface. When the CAN function is used,
output from the other functions must be stopped.
General I/O port. This function is always enabled.
D External interrupt request input pin for INT2. Set the corresponding
DDR register to input if this function is used.
Power supply pin for the A/D Converter. This power supply must be
Power supply turned on or off while a voltage higher than or equal to AVCC is ap-
plied to VCC.
Power supply Dedicated ground pin for the A/D Converter
External reference voltage pin for the A/D Converter. This power
Power supply supply must be turned on or off while a voltage higher than or equal
to AVRH is applied to AVCC.
Power supply External reference voltage pin for the A/D Converter
C
Input pins for specifying the operating mode. The pins must be di-
rectly connected to VCC or Vss.
F
Input pin for specifying the operating mode. The pin must be directly
connected to VCC or Vss.
This is the power supply stabilization capacitor pin. It should be con-
nected externally to an 0.1 µF ceramic capacitor.
Power supply Voltage (5.0 V) input pin
Power supply Voltage (0.0 V) input pin
s INPUT LEVELS
The input level of ports P00 to P37 can be selected to be either TTL- or CMOS - level. The initial setting is TTL
- level. These settings are global for all P00 to P37, it is not possible to set different levels to each port.
The input level of ports P40 to PA0 can be selected to be either CMOS- or AUTOMOTIVE - level. The initial
setting is CMOS - level. This settings can be done for each port individually.
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