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PDF CM3196 Data sheet ( Hoja de datos )

Número de pieza CM3196
Descripción Bus Termination Regulator
Fabricantes California Micro Devices 
Logotipo California Micro Devices Logotipo



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CM3196
2A Sink/Source DDR-I, -II Bus Termination Regulator
Features
• Ideal for DDR-I, -II VTT applications
• Sinks and sources 2A for DDR-I, 0.6A for DDR-II
• Shutdown input to support ACPI states
• Operates down to 1.5V input voltage
• Integrated power MOSFETs
• Overcurrent protection
• Over temperature protection
www.DataSheet4U.cEomxcellent accuracy
VTT = VREF ± 30mV
VTT = VDDQ/2 ± 2%
• 8-pin SOIC or PSOP package
• Lead-free versions available
Applications
• DDR-I, -II memory termination
• Active termination buses
• Graphics card memory termination
Product Description
The CM3196 is a sinking and sourcing regulator specif-
ically designed for DDR-I, -II VTT bus termination. The
output voltage accurately tracks VDDQ/2. For DDR-I it
can source and sink current up to 2A with a load regu-
lation of 0.5%. This current adequately serves both sin-
gle and dual channel DDR-I memory systems. For
power conscious notebook applications, the CM3196
also operates from a VDDQ of 1.5V or 1.8V with less
current drive. For DDR-II applications, the CM3196
provides up to 0.6A at 0.9V to drive the memory con-
troller VTT.
For boards which support Suspend to RAM (STR)
functionality, the CM3196 provides a Shutdown (SD)
pin. When SD is set low, VTT will be in tri-state mode,
causing the output to go high impedance. In this mode,
CM3196 power is saved by significantly reducing the
quiescent current. VREF voltage remains VDDQ/2.
The CM3196 provides overcurrent and over tempera-
ture protection. These features protect the chip from
excessive heating due to high current and high temper-
ature.
The CM3196 is housed in an 8-pin SOIC or PSOP
package and is available with optional lead-free finish-
ing.
Simplified Electrical Schematic
AVIN
VDDQ
PVIN
Over Temp
SD Over Current
Reference
VREF
OUT
Buffer
IN
Driver
VTT
VSENSE
GND
© 2004 California Micro Devices Corp. All rights reserved.
04/22/04 430 N. McCarthy Blvd., Milpitas, CA 95035-5112 Tel: 408.263.3214
Fax: 408.263.7846 www.calmicro.com
1

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CM3196 pdf
CM3196
Specifications (cont’d)
DDR-II Features
STANDARD OPERATING CONDITIONS
PARAMETER
VDDQ
AVIN
PVIN
www.DataSheet4AUm.cboiment Operating Temperature
CVOUT
VALUE
1.8
3.3
1.8
-40 to +85
220 +20%
UNITS
V
V
V
°C
µF
SYMBOL
VIN
ICC
ICCSD
VTT
VREF
VOSVTT
ZREF
ZVDDQ
ILIM
VSD
TDISABLE
THYST
ELECTRICAL OPERATING CHARACTERISTICS (SEE NOTE 1)
PARAMETER
Input Voltage Range
PVIN pin
AVIN pin
AVIN Quiescent Current
AVIN Quiescent Current
in Shut Down
VTT Output Voltage
PVIN = 1.8V
PVIN = 1.5V
AVIN > 2.2V, PVIN > 2.2V
Output Reference Voltage
Output Offset from VREF
VREF Output Impedance
VDDQ Input Impedance
VTT Current Limit
Shutdown Logic
Logic "1" Level
Logic "0" Level
Shutdown Temperature
Thermal Hysteresis
CONDITIONS
ITT = 0A
VSD = logic "0"
ILOAD = 0 to 0.6A or ILOAD = -0.6A to 0A
ILOAD = 0 to 0.3A or ILOAD = -0.3A to 0A
ILOAD = 0 to 1.2A or ILOAD = -1.2A to 0A
VDDQ = 1.8V, IREF = 0A
IREF = -5µA to 5µA
MIN TYP MAX UNITS
1.5 1.8 AVIN
2.2 3.3 5.5
450
115
V
V
µA
µA
0.882 0.9 0.918
0.882 0.9 0.918
0.882 0.9 0.918
0.882 0.9 0.918
-30 30
5
100
2.5
1.5
0.4
150
30
V
V
V
V
mV
k
k
A
V
V
°C
°C
Note 1: Operating characteristics are over Standard Operating Conditions unless otherwise specified.
© 2004 California Micro Devices Corp. All rights reserved.
04/22/04 430 N. McCarthy Blvd., Milpitas, CA 95035-5112 Tel: 408.263.3214
Fax: 408.263.7846 www.calmicro.com
5

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CM3196 arduino
CM3196
Application Information
PCB Layout Considerations
The CM3196-12SB has a heat spreader attached to
the underneath of the PSOP-8 package in order for
heat to be transferred easily from the package to the
PCB. The heat spreader is a copper pad of dimensions
just smaller than the package itself. By positioning the
matching pad on the PCB top layer to connect to the
spreader during manufacturing, the heat will be trans-
ferred between the two pads. The drawing below
www.DataSheest4hUo.wcosmthe recommended PCB layout. Note that there
are six vias on either side to allow the heat to dissipate
into the ground and power planes on the inner layers of
the PCB. Vias can be placed underneath the chip, but
this can cause blockage of the solder. The ground and
power planes should be at least 2 sq. in. of copper
adjacent to the vias. It also helps if the chip is posi-
tioned away from the edge of the PCB, and not near
other heat dissipating devices. A good thermal link
from the PCB pad to the rest of the PCB will properly
couple the CM3196 package to maintain an ambient
junction temperature (θJA) of around 40°C/W.
Figure 15. Recommended Heat Sink PCB Layout
SD
VDDQ
AVIN
PVIN
CAVIN
47µF
SD
VDDQ
AVIN
PVIN
CPVIN
47µF
VREF
VSENSE
GND
VTT
VREF
CVREF
0.1µF
VTT
CVout
220µF
Figure 16. Typical Application Circuit
© 2004 California Micro Devices Corp. All rights reserved.
04/22/04 430 N. McCarthy Blvd., Milpitas, CA 95035-5112 Tel: 408.263.3214
Fax: 408.263.7846 www.calmicro.com
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