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PDF CM3121 Data sheet ( Hoja de datos )

Número de pieza CM3121
Descripción Dual Linear Voltage Regulator
Fabricantes California Micro Devices 
Logotipo California Micro Devices Logotipo



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PRELIMINARY
CM3121
Dual Linear Voltage Regulator for DDR-I and DDR-II Memory
Features
• Fully integrated power solution for DDR memory
ICs
• Ideal for DDR-I (2.5VDDQ) and DDR-II (1.8VDDQ)
• Lowest system cost and smallest footprint with just
two external output capacitors
• Two linear regulators:
www.DataSheet4U.como- fV1D.D5QA
regulator with a maximum output current
shared by DRAM and VTT regulator
- source-sink VTT regulator with maximum out-
put current of 0.5A (DDR-I) or 0.3A (DDR-II)
• Fault output indicates overcurrent condition in
either regulator, under voltage lock-out and over-
temperature condition
• Reverse current protection if host is powered off
• PSOP-8 package with integrated heat spreader
• Lead-free versions available
Applications
• DDR-I and DDR-II memory power for:
Set Top Boxes, DVD Players, Games
Digital TVs, Flat Panel Displays
Printers, Digital Projectors
Embedded systems
Communications systems
Product Description
The CM3121 provides an integrated power solution for
DDR-I and DDR-II memory systems in consumer electron-
ics applications. The CM3121 is ideal for a 2.8V to 3.6V
supply for DDR-I memory and 2.2V to 2.8V for DDR-II mem-
ory. The CM3121 features two independent linear regula-
tors for VDDQ and VTT supply regulation. The default
voltage for VDDQ is 2.5V. The VDDQ regulator SENSE pin
allows for setting VDDQ in the 2.2V to 2.8V range, or DDR-II
memories from 1.7V to 1.9V. The VTT regulator output is
always half the VDDQ voltage, derived internally. A capacitor
should be connected to each of the two outputs.
When EN_DDR is set high, the two DDR regulators are dis-
abled to minimize overall system power dissipation such as
when memory is in standby.
The FAULT pin goes low whenever either of the two regula-
tors goes into current limit mode, the input voltage drops too
far or if overtemp occurs.
The CM3121 is available in a PSOP-8 package that has
excellent thermal dissipation. It is available with optional
lead-free finishing.
.
Typical Application Circuit
2.8V to 3.3V
VCC
CCC
Enable DDR
Memory #
EN_DDR
VREF
R
R
VDDQ
REGULATOR
VDDQ
VDDQ = 2.5V
SENSE
VDDQ
VTT
REGULATOR
VTT
CDDQ
VTT=1.25V
DDR
MEMORY
SENSE VTT
CTT
Circuit Schematic
VCC
VREF
EN_DDR
R
R
VDDQ
REGULATOR
VDDQ
SENSE
VDDQ
VDDQ
SENSE_ VDDQ
VTT
REGULATOR
VTT
SENSE VTT
VTT
SENSE_VTT
CURRENT LIMIT
OVERTEMP
LOW INPUT
GND
FAULT
CPU
CORE
+ I/O
CURRENT LIMIT
OVERTEMP
LOW INPUT
GND
FAULT
© 2004 California Micro Devices Corp. All rights reserved.
11/12/04 430 N. McCarthy Blvd., Milpitas, CA 95035-5112 Tel: 408.263.3214 Fax: 408.263.7846 www.calmicro.com
1

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CM3121 pdf
PRELIMINARY
CM3121
ELECTRICAL OPERATING CHARACTERISTICS (CONT’D) (SEE NOTE1)
VTT Regulator Parameters
VTT Output Voltage Range
VDDQ = 2.5V, ITT = 0.01A,
VTT REF Output Voltage Range
VDDQ = 2.500V, ITT = 0.01A
VTT LD Load Regulation
TA = 25°C, VDDQ = 2.5V,
0.01A ITT ±0.5A
VTT LINE Line Regulation
TA = 25°C, ITT = 0.01A,
2.8V VCC 3.6V, Note 2
w w w . D eNaTT t aOutSput hNoisee Veoltagt e 4 U . cBWo= 1m0Hz - 100kHz, CTT = 10µF
ITT LIM Current Limit
ITT SC Short Circuit Current
VTT < 0.3V
1.20
1.225
-1.0
1.25
1.250
-
1.30
1.275
1.0
V
V
%
-1.0 - 1.0 %
51
0.6 0.8
0.3
µVrms
A
A
Note 1: All parameters specified at TA = -40°C to +85°C unless otherwise noted.
Note 2: Note that the IDDQ current specified is the load current output from the VDDQ pin. VDDQ also supplies current internally to the
VTT regulator when it is sourcing current. The maximum source current can be up to 0.5A. So the maximum total current
from the VDDQ regulator is the external VDDQ current IDDQ added to the maximum VTT sourcing current ITT. All load currents
are specified as such, but the VDDQ current limit is specified at a current just above the total maximum current.
DDR-II Specifications
ELECTRICAL OPERATING CHARACTERISTICS (SEE NOTE 3)
SYMBOL PARAMETER
CONDITIONS
MIN TYP
General Parameters
TOVER
THYST
ICCN
Shutdown Junction Temperature
Junction Temp Hysterisis
IC in shutdown
Normal Mode VCC Supply
Current
EN_DDR = logic "0",
- 150
- 25
700
ICCQ
VIH
VIL
UVLO
Shutdown Mode VCC Supply
Current
EN_DDR Input High Threshold
EN_DDR Input Low Threshold
Under Voltage Lock-Out
EN_DDR = logic "1",
VDDQ = 0V, VTT = 0V
VCC =3.3V
VCC =3.3V
IDDQ = 10mA
2
2.0
MAX
-
-
1100
10
0.4
1.8
UNITS
°C
°C
µA
µA
V
V
V
tRISE
VDDQ Rise TIme
VCC = 3.3V, CDDQ = 10µF
0.5 ms
© 2004 California Micro Devices Corp. All rights reserved.
11/12/04 430 N. McCarthy Blvd., Milpitas, CA 95035-5112 Tel: 408.263.3214 Fax: 408.263.7846 www.calmicro.com
5

5 Page





CM3121 arduino
Mechanical Details
PSOP-8 Mechanical Specifications
Dimensions for CM3121 devices packaged in an 8-
lead PSOP package with a heatspreader are shown
below.
PACKAGE DIMENSIONS
Package
PSOP-8
www.DataSheet4U.cLomeads
8
Dimensions
Millimeters
Min Max
Inches
Min Max
A
1.30
1.62
0.051
0.064
A1
0.03
0.10
0.001
0.004
B
0.33
0.51
0.013
0.020
C
0.18
0.25
0.007
0.010
D
4.83
5.00
0.190
0.197
E
3.81
3.99
0.150
0.157
e
1.02
1.52
0.040
0.060
H
5.79
6.20
0.228
0.244
L
0.41
1.27
0.016
0.050
x**
3.30
3.81
0.130
0.150
y**
2.29
2.79
0.090
0.110
# per tube
100 pieces*
# per tape
and reel
2500 pieces
Controlling dimension: inches
* This is an approximate number which may vary.
** Centered on package centerline.
PRELIMINARY
CM3121
Mechanical Package Diagrams
TOP VIEW
D
8765
H Pin 1 E
Marking
1234
BOTTOM VIEW
D
1234
Heat Slug
Hy
x
x/2 y/2
E
8765
SIDE VIEW
A
SEATING
PLANE
B
e
END VIEW
C
A1
L
Package Dimensions for PSOP-8
© 2004 California Micro Devices Corp. All rights reserved.
11/12/04 430 N. McCarthy Blvd., Milpitas, CA 95035-5112 Tel: 408.263.3214 Fax: 408.263.7846 www.calmicro.com 11

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