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W78E054C Schematic ( PDF Datasheet ) - Winbond

Teilenummer W78E054C
Beschreibung 8-BIT MICROCONTROLLER
Hersteller Winbond
Logo Winbond Logo 




Gesamt 24 Seiten
W78E054C Datasheet, Funktion
W78E54C/W78E054C Data Sheet
8-BIT MICROCONTROLLER
Table of Contents-
1.
2.
www.DataSheet4U.com3.
4.
5.
6.
7.
8.
GENERAL DESCRIPTION ......................................................................................................... 3
FEATURES ................................................................................................................................. 3
PIN CONFIGURATIONS ............................................................................................................ 4
PIN DESCRIPTION..................................................................................................................... 5
FUNCTIONAL DESCRIPTION ................................................................................................... 6
5.1 Timers 0, 1, and 2 ........................................................................................................... 6
5.2 New Defined Peripheral.................................................................................................. 6
5.2.1 INT2 / INT3 ....................................................................................................................6
5.2.2 PORT4 .............................................................................................................................7
5.2.3 Reduce EMI Emission ......................................................................................................7
5.3 Power-off Flag ................................................................................................................ 8
5.4 Watchdog Timer ............................................................................................................. 8
5.5 Clock ............................................................................................................................. 10
5.6 Power Management...................................................................................................... 10
5.7 Reset............................................................................................................................. 10
SECURITY BITS ....................................................................................................................... 11
6.1 Lock Bit ......................................................................................................................... 11
6.2 MOVC Inhibit................................................................................................................. 12
6.3 Encryption ..................................................................................................................... 12
ELECTRICAL CHARACTERISTICS......................................................................................... 13
7.1 Absolute Maximum Ratings .......................................................................................... 13
7.2 D.C. Characteristics...................................................................................................... 13
7.3 A.C. Characteristics ...................................................................................................... 15
7.3.1 Clock Input Waveform ....................................................................................................15
7.3.2 Program Fetch Cycle......................................................................................................15
7.3.3 Data Read Cycle ............................................................................................................16
7.3.4 Data Write Cycle.............................................................................................................16
7.3.5 Port Access Cycle ..........................................................................................................16
7.3.6 Program Operation .........................................................................................................17
TIMING WAVEFORMS ............................................................................................................. 18
Publication Release Date: October 3, 2006
- 1 - Revision A4






W78E054C Datasheet, Funktion
W78E54C/W78E054C
5. FUNCTIONAL DESCRIPTION
The W78E054C architecture consists of a core controller surrounded by various registers, five general
purpose I/O ports, 256 bytes of RAM, three timer/counters, and a serial port. The processor supports
111 different opcodes and references both a 64K program address space and a 64K data storage
space.
5.1 Timers 0, 1, and 2
www.DataSheet4U.comTimers 0, 1, and 2 each consist of two 8-bit data registers. These are called TL0 and TH0 for Timer 0,
TL1 and TH1 for Timer 1, and TL2 and TH2 for Timer 2. The TCON and TMOD registers provide
control functions for timers 0 and 1. The T2CON register provides control functions for Timer 2.
RCAP2H and RCAP2L are used as reload/capture registers for Timer 2.
The operations of Timer 0 and Timer 1 are the same as in the W78C51. Timer 2 is a special feature of
the W78E054C: it is a 16-bit timer/counter that is configured and controlled by the T2CON register.
Like Timers 0 and 1, Timer 2 can operate as either an external event counter or as an internal timer,
depending on the setting of bit C/T2 in T2CON. Timer 2 has three operating modes: capture, auto-
reload, and baud rate generator. The clock speed at capture or auto-reload mode is the same as that
of Timers 0 and 1.
5.2 New Defined Peripheral
In order to be more suitable for I/O, an extra 4-bit bit-addressable port P4 and two external interrupt
INT2 , INT3 has been added to either the PLCC or QFP 44-pin package. And description follows:
5.2.1 INT2 / INT3
Two additional external interrupts, INT2 and INT3 , whose functions are similar to those of external
interrupt 0 and 1 in the standard 80C52. The functions/status of these interrupts are
determined/shown by the bits in the XICON (External Interrupt Control) register. The XICON register is
bit-addressable but is not a standard register in the standard 80C52. Its address is at 0C0H. To
set/clear bits in the XICON register, one can use the "SETB (/CLR) bit" instruction. For example,
"SETB 0C2H" sets the EX2 bit of XICON.
XICON - external interrupt control (C0H)
PX3 EX3 IE3 IT3 PX2 EX2 IE2 IT2
PX3: External interrupt 3 priority high if set
EX3: External interrupt 3 enable if set
IE3: If IT3 = 1, IE3 is set/cleared automatically by hardware when interrupt is detected/serviced
IT3: External interrupt 3 is falling-edge/low-level triggered when this bit is set/cleared by software
PX2: External interrupt 2 priority high if set
EX2: External interrupt 2 enable if set
IE2: If IT2 = 1, IE2 is set/cleared automatically by hardware when interrupt is detected/serviced
IT2: External interrupt 2 is falling-edge/low-level triggered when this bit is set/cleared by software
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W78E054C pdf, datenblatt
W78E54C/W78E054C
6.2 MOVC Inhibit
This bit is used to restrict the accessible region of the MOVC instruction. It can prevent the MOVC
instruction in external program memory from reading the internal program code. When this bit is set to
logic 0, a MOVC instruction in external program memory space will be able to access code only in the
external memory, not in the internal memory. A MOVC instruction in internal program memory space
will always be able to access the ROM data in both internal and external memory. If this bit is logic 1,
there are no restrictions on the MOVC instruction.
www.DataSheet4U.com6.3 Encryption
This bit is used to enable/disable the encryption logic for code protection. Once encryption feature is
enabled, the data presented on port 0 will be encoded via encryption logic. Only whole chip erase will
reset this bit.
- 12 -

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