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PDF ALD2724E Data sheet ( Hoja de datos )
| Número de pieza | ALD2724E | |
| Descripción | DUAL EPAD PRECISION HIGH SLEW RATE CMOS OPERATIONAL AMPLIFIER | |
| Fabricantes | Advanced Linear Devices | |
| Logotipo |  |
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ADVANCED
LINEAR
DEVICES, INC.
ALD2724E/ALD2724
DUAL EPAD® PRECISION HIGH SLEW RATE CMOS OPERATIONAL AMPLIFIER
KEY FEATURES
• Factory pre-trimmed VOS
• VOS = 25µV @ IOS = 0.01pA
• 5 V / µs slew rate
• EPAD ( Electrically Programmable Analog Device)
• Rail-to-rail input/output
• Each amplifier VOS can be user trimmed to
www.DataSheet4U.coamdifferent Vos level (optional)
• System level “calibration” capable
GENERAL DESCRIPTION
The ALD2724E/ALD2724 is a dual monolithic operational amplifier with
MOSFET input that has rail-to-rail input and output voltage ranges. The
input voltage range and output voltage range are very close to the positive
and negative power supply voltages. Typically the input voltage can be
beyond positive power supply voltage V+ or the negative power supply
voltage V- by up to 300mV. The output voltage swings to within 60mV of
either positive or negative power supply voltages at rated load.
With high impedance load, the output voltage of the ALD2724E/ALD2724
approaches within 1mV of the power supply rails. This device is designed
as an alternative to the popular J-FET input operational amplifier in
applications where lower operating voltages, such as 9V battery or ±3.25V
to ±5V power supplies are being used. The ALD2724E/ALD2724 offers
high slew rate of 5.0V/µs.
The rail-to-rail input and output feature of the ALD2724E/ALD2724 ex-
pands signal voltage range for a given operating supply voltage and allows
numerous analog serial stages to be implemented without losing operat-
ing voltage margin. The output stage is designed to drive up to 10mA into
400pF capacitive and 1.5KΩ resistive loads at unity gain and up to 4000pF
at a gain of 5. Short circuit protection to either ground or the power supply
rails is at approximately 15mA clamp current. Due to complementary
output stage design, the output can source and sink 10mA into a load with
symmetrical drive and is ideally suited for applications where push-pull
voltage drive is desired.
For each of the operational amplifier, the offset voltage is trimmed on-chip
to eliminate the need for external nulling in many applications. For
precision applications, the output is designed to settle to 0.1% in 2µs. In
large signal buffer applications, the operational amplifier can function as
ORDERING INFORMATION
Operating Temperature Range
-55°C to +125°C
0°C to +70°C
0°C to +70°C
14-Pin
CERDIP
Package
14-Pin
Small Outline
Package (SOIC)
14-Pin
Plastic Dip
Package
ALD2724E DB
ALD2724 DB
ALD2724E SB
ALD2724 SB
ALD2724E PB
ALD2724 PB
BENEFITS
• Ready to use off the shelf standard part
• Custom automated trimming optional
• Remote controlled automated trimming
• In-System Programming capable
• No external components
• No internal clocking noise source
• Simple and cost effective
• Small package size
• Extremely small total functional
volume size
• Low system implementation cost
APPLICATIONS
• Sensor interface circuits
• Transducer biasing circuits
• Capacitive and charge integration circuits
• Biochemical probe interface
• Signal conditioning
• Portable instruments
• High source impedance electrode
amplifiers
• Precision Sample and Hold amplifiers
• Precision current to voltage converter
• Error correction circuits
• Sensor compensation circuits
• Precision gain amplifiers
• Periodic In-system calibration
• System output level shifter
PIN CONFIGURATION
-IN A 1
+IN A 2
N/C 3
14 VE 2A
13 VE 1A
12 OUT A
V- 4
N/C 5
11 V+
10 OUT B
+IN B 6
9 VE 1B
-IN B 7
8 VE 2B
TOP VIEW
DB, PB, SB PACKAGE
* Contact factory for industrial temperature range
©2002 Advanced Linear Devices, Inc. 415 Tasman Drive, Sunnyvale, California 94089 -1706 Tel: (408) 747-1155 Fax: (408) 747-1286 http://www.aldinc.com
1 page  
VS = ±5.0V -55°C ≤ TA ≤ +125°C unless otherwise specified
Parameter
2724E
2724
Symbol Min Typ Max Min Typ
Initial Input offset Voltage
Input Offset Current
VOS i
IOS
0.7
2.0
0.7
Input Bias Current
Initial Power Supply
Rejection Ratio 8
IB
PSRR i
2.0
85
85
www.DataSheet4U.comInitial Common Mode
Rejection Ratio 8
CMRR i
97
97
Large Signal Voltage Gain
AV
10 25
10 25
Output Voltage Range
VO low
VO high
4.8
-4.9 -4.8
4.9
4.8
-4.9
4.9
Max
2.0
2.0
Unit Test Conditions
mV RS ≤ 100KΩ
nA
nA
dB RS ≤ 100KΩ
dB RS ≤ 100KΩ
V/mV RL = 10KΩ
-4.8 V
V
RL = 10KΩ
ALD2724E/ALD2724
Advanced Linear Devices
5
5 Page | ||
| Páginas | Total 10 Páginas | |
| PDF Descargar | [ Datasheet ALD2724E.PDF ] | |
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