|
|
PDF UDA1352TS Data sheet ( Hoja de datos )
| Número de pieza | UDA1352TS | |
| Descripción | 48 kHz IEC 60958 audio DAC | |
| Fabricantes | NXP Semiconductors | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de UDA1352TS (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
|
No Preview Available !
INTEGRATED CIRCUITS
DATA SHEET
www.DataSheet4U.com
UDA1352TS
48 kHz IEC 60958 audio DAC
Preliminary specification
Supersedes data of 2002 May 22
2002 Nov 22
1 page  
Philips Semiconductors
48 kHz IEC 60958 audio DAC
6 BLOCK DIAGRAM
Preliminary specification
UDA1352TS
www.DataSheehta4nUdb.ocook,mfull pagewidth
TEST1 TEST2
VDDA(PLL)
VSSA(PLL)
VDDD(C)
VSSD(C)
24
23
6
12
CLOCK
AND
TIMING CIRCUIT
DA0
DA1
L3MODE
L3CLOCK
L3DATA
28
25
10
9
8
L3-BUS
OR I2C-BUS
INTERFACE
SELSTATIC
26
SELIIC
4
SLICER
2 18
UDA1352TS
NON-PCM DATA
SYNC
DETECTOR
SPDIF
VDDD
VSSD
13
3
7
IEC 60958
DECODER
21, 22, 27 1
16
n.c. PCMDET LOCK
VDDA(DAC)
Vref
VOUTL VSSA(DAC) VOUTR
15 14 20 19 17
DAC
DAC
NOISE SHAPER
INTERPOLATOR
AUDIO FEATURE PROCESSOR
11 MUTE
5 RESET
MGU655
Fig.1 Block diagram.
2002 Nov 22
5
5 Page 
Philips Semiconductors
48 kHz IEC 60958 audio DAC
Preliminary specification
UDA1352TS
8.5.2 L3-BUS OR I2C-BUS MODE
The L3-bus or I2C-bus mode allows maximum flexibility in controlling the UDA1352TS (see Table 4).
It should be noted that in the L3-bus or I2C-bus mode, several base-line functions are still controlled by pins on the device
and that, on start-up in the L3-bus or I2C-bus mode, the output is explicitly muted by bit MT via the L3-bus or I2C-bus
interface.
www.DataSheTeat4bUl.eco4m Pin description in the L3-bus or I2C-bus mode
PIN NAME VALUE
FUNCTION
Mode selection pins
26 SELSTATIC 0 select L3-bus mode or I2C-bus mode; must be connected to VSSD
4 SELIIC
0 select L3-bus mode; must be connected to VSSD
1 select I2C-bus mode; must be connected to VDDD
Input pins
5 RESET
0 normal operation
1 reset
8 L3DATA
9 L3CLOCK
10 L3MODE
− must be connected to the L3-bus
− must be connected to the SDA line of the I2C-bus
− must be connected to the L3-bus
− must be connected to the SCL line of the I2C-bus
− must be connected to the L3-bus
11 MUTE
0 no mute
1 mute active
Status pins
1 PCMDET
16 LOCK
0 non-PCM data or burst preamble detected
1 PCM data detected
0 clock regeneration and IEC 60958 decoder out-of-lock or non-PCM data detected
1 clock regeneration and IEC 60958 decoder locked and PCM data detected
Test pins
2 TEST1
18 TEST2
− must be left open-circuit
0 must be connected to VSSD
2002 Nov 22
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet UDA1352TS.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| UDA1352TS | 48 kHz IEC 60958 audio DAC | NXP Semiconductors |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |