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Y27US08121M Schematic ( PDF Datasheet ) - Hynix Semiconductor

Teilenummer Y27US08121M
Beschreibung HY27US08121M
Hersteller Hynix Semiconductor
Logo Hynix Semiconductor Logo 




Gesamt 43 Seiten
Y27US08121M Datasheet, Funktion
HY27SS(08/16)121M Series
HY27US(08/16)121M Series
512Mbit (64Mx8bit / 32Mx16bit) NAND Flash
Document Title
512Mbit (64Mx8bit / 32Mx16bit) NAND Flash Memory
Revision History
w w w . D a t a S h eNeot .4 U . c o m
0.0 Initial Draft
History
0.1 Renewal Product Group
0.2 Make a decision of PKG information
0.3 Append 1.8V Operation Product to Data sheet
1) Add Errata
Draft Date
Sep.17.2003
Oct.07.2003
Nov.08.2003
Dec.01.2003
Remark
Preliminary
Preliminary
Preliminary
Preliminary
tWC tWH tWP tRC tREH tRP tREA@ID Read
Specification 50 15 25 50 15 30
35
Relaxed value 60 20 40 60 20 40
45
0.4 Mar.28.2004
Preliminary
2) Modify the description of Device Operations
- /CE Don’t Care Enabled(Disabled) -> Sequential Row Read Disabled
(Enabled) (Page22)
3) Add the description of System Interface Using CE don’t care
(Page37)
1) Delete Errata
2) Change Characteristics (3V Product)
0.5 Before
After
tCRY
60 + tr
70 + tr
tREA@ID Read
35
45
Jun. 01. 2004 Preliminary
3) Delete Cache Program
1) Change TSOP1, WSOP1, FBGA package dimension
0.6 2) Edit TSOP1, WSOP1 package figures
3) Change FBGA package figure
Oct. 20. 2004
This document is a general product description and is subject to change without notice. Hynix does not assume any responsibility for
use of circuits described. No patent licenses are implied.
Rev 0.6 / Oct. 2004
1






Y27US08121M Datasheet, Funktion
HY27SS(08/16)121M Series
HY27US(08/16)121M Series
512Mbit (64Mx8bit / 32Mx16bit) NAND Flash
1 2 3 4 5 6 7 8 9 10
www.DataSheet4U.com
A NC NC
NC NC
B NC
NC NC
C WP ALE VSS CE WE RB
D NC RE CLE NC NC NC
E NC NC NC NC NC NC
F NC NC NC NC NC NC
G NC NC NC NC NC NC
H NC I/O0 NC NC NC VCC
J NC I/O1 NC VCC I/O5 I/O7
K VSS I/O2 I/O3 I/O4 I/O6 VSS
L NC NC
M NC NC
NC NC
NC NC
Figure 5. 63-FBGA Contactions, x8 Device (Top view through package)
1 2 3 4 5 6 7 8 9 10
A NC NC
B NC
NC NC
NC NC
C WP ALE VSS CE WE RB
D NC RE CLE NC NC NC
E NC NC NC NC NC NC
F NC NC NC NC NC NC
G NC NC NC I/O5 I/O7 NC
H I/O8 I/O1 I/O10 I/O12 I/O14 VCC
J I/O0 I/O9 I/O3 VCC I/O6 I/O15
K VSS I/O2 I/O11 I/O4 I/O13 VSS
L NC NC
M NC NC
NC NC
NC NC
Figure 6. 63-FBGA Contactions, x16 Device (Top view through package)
Rev 0.6 / Oct. 2004
6

6 Page









Y27US08121M pdf, datenblatt
HY27SS(08/16)121M Series
HY27US(08/16)121M Series
512Mbit (64Mx8bit / 32Mx16bit) NAND Flash
COMMAND SET
All bus write operations to the device are interpreted by the Command Interface. The Commands are input on I/O0-I/
O7 and are latched on the rising edge of Write Enable when the Command Latch Enable signal is high. Device opera-
tions are selected by writing specific commands to the Command Register. The two-step command sequences for pro-
gram and erase operations are imposed to maximize data security.
The Commands are summarized in Table 5, Commands.
Table 5: Command Set
www.DataSheet4U.com
FUNCTION
READ A
READ B
READ C
READ ELECTRINIC SIGNATURE
READ STATUS REGISTER
PAGE PROGRAM
COPY BACK PROGRAM
BLOCK ERASE
RESET
1st CYCLE
00h
01h
50h
90h
70h
80h
00h
60h
FFh
2nd CYCLE
-
-
-
-
-
10h
8Ah
D0h
-
3rd CYCLE
-
-
-
-
-
-
10h
-
-
Command accepted during busy
Yes
Yes
Note: (1). Any undefined command sequence will be ignored by the device.
(2). Bus Write Operation(1st, 2nd and 3rd Cycle) : The bus cycles are only shown for issuing the codes. The cycles required to
input the addresses or input/output data are not shown.
DEVICE OPERATIONS
Pointer Operations
As the NAND Flash memories contain two different areas for x16 devices and three different areas for x8 devices (see
Figure 8) the read command codes (00h, 01h, 50h) are used to act as pointers to the different areas of the memory
array (they select the most significant column address).
The Read A and Read B commands act as pointers to the main memory area. Their use depends on the bus width of
the device.
- In x16 devices the Read A command (00h) sets the pointer to Area A (the whole of the main area) that is Words 0
to 255.
- In x8 devices the Read A command (00h) sets the pointer to Area A (the first half of the main area) that is Bytes 0
to 255, and the Read B command (01h) sets the pointer to Area B (the second half of the main area) that is Bytes 256
to 511.
In both the x8 and x16 devices the Read C command (50h), acts as a pointer to Area C (the spare memory area) that
is Bytes 512 to 527 or Words 256 to 263.
Once the Read A and Read C commands have been issued the pointer remains in the respective areas until another
Rev 0.6 / Oct. 2004
12

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