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PDF LTC2629 Data sheet ( Hoja de datos )
| Número de pieza | LTC2629 | |
| Descripción | (LTC26x9) Quad 16-/14-/12-Bit Rail-to-Rail DACs | |
| Fabricantes | Linear Technology | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de LTC2629 (archivo pdf) en la parte inferior de esta página. Total 20 Páginas | ||
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FEATURES
■ Smallest Pin-Compatible Quad DACs:
LTC2609: 16 Bits
LTC2619: 14 Bits
LTC2629: 12 Bits
■ Guaranteed Monotonic Over Temperature
www.DataSh■eetS4Ue.pcoamrate Reference Inputs
■ 27 Selectable Addresses
■ 400kHz I2C™ Interface
■ Wide 2.7V to 5.5V Supply Range
■ Low Power Operation: 250µA per DAC at 3V
■ Individual Channel Power Down to 1µA (Max)
■ High Rail-to-Rail Output Drive (±15mA, Min)
■ Ultralow Crosstalk Between DACs (5µV)
■ LTC2609/LTC2619/LTC2629: Power-On Reset to
Zero Scale
■ LTC2609-1/LTC2619-1/LTC2629-1: Power-On Reset
to Midscale
■ Tiny 16-Lead Narrow SSOP Package
U
APPLICATIO S
■ Mobile Communications
■ Process Control and Industrial Automation
■ Automatic Test Equipment and Instrumentation
LTC2609/LTC2619/LTC2629
Quad 16-/14-/12-Bit
Rail-to-Rail DACs with
I2C Interface
DESCRIPTIO
The LTC®2609/LTC2619/LTC2629 are quad 16-, 14- and
12-bit, 2.7V-to-5.5V rail-to-rail voltage output DACs in a
16-lead SSOP package. They have built-in high perfor-
mance output buffers and are guaranteed monotonic.
These parts establish new board-density benchmarks for
16- and 14-bit DACs and advance performance standards
for output drive and load regulation in single-supply,
voltage-output DACs.
The parts use a 2-wire, I2C compatible serial interface. The
LTC2609/LTC2619/LTC2629 operate in both the standard
mode (clock rate of 100kHz) and the fast mode (clock rate
of 400kHz).
The LTC2609/LTC2619/LTC2629 incorporate a power-on
reset circuit. During power-up, the voltage outputs rise
less than 10mV above zero scale; after power-up, they stay
at zero scale until a valid write and update take place. The
power-on reset circuit resets the LTC2609-1/LTC2619-1/
LTC2629-1 to midscale. The voltage outputs stay at
midscale until a valid write and update take place.
, LTC and LT are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
Protected by U.S. Patents, including 5396245. Patent pending.
BLOCK DIAGRA
REFA 3
VOUTA 4
DAC A
REFLO
2
VOUTB
5
REFB 6
DAC B
GND VCC
1 16
CONTROL
LOGIC
DAC D
15 REFD
14 VOUTD
DAC C
13 VOUTC
12 REFC
SCL 8
SDA 9
32-BIT SHIFT REGISTER
I2C
INTERFACE
ADDRESS
DECODE
LOGIC
11 CA0
10 CA1
7 CA2
2609 BD
Differential Nonlinearity
(LTC2609)
1.0
VCC = 5V
0.8 VREF = 4.096V
0.6
0.4
0.2
0
–0.2
–0.4
–0.6
–0.8
–1.0
0
16384
32768
CODE
49152
65535
2609 G02
26091929f
1
1 page  
LTC2609/LTC2619/LTC2629
TYPICAL PERFOR A CE CHARACTERISTICS
LTC2609
Integral Nonlinearity (INL)
32
VCC = 5V
24 VREF = 4.096V
16
8
0
www.DataSheet4–U8 .com
–16
–24
–32
0
16384
32768
CODE
49152 65535
2609 G01
Differential Nonlinearity (DNL)
1.0
VCC = 5V
0.8 VREF = 4.096V
0.6
0.4
0.2
0
–0.2
–0.4
–0.6
–0.8
–1.0
0
16384
32768
CODE
49152
65535
2609 G02
INL vs Temperature
32
VCC = 5V
24 VREF = 4.096V
16
8 INL (POS)
0
–8
INL (NEG)
–16
–24
–32
–50 –30 –10 10 30 50
TEMPERATURE (°C)
70 90
2609 G03
DNL vs Temperature
1.0
VCC = 5V
0.8 VREF = 4.096V
0.6
0.4
DNL (POS)
0.2
0
–0.2
DNL (NEG)
–0.4
–0.6
–0.8
–1.0
–50 –30 –10 10 30 50
TEMPERATURE (°C)
70 90
2609 G04
INL vs VREF
32
VCC = 5.5V
24
16
8 INL (POS)
0
–8 INL (NEG)
–16
–24
–32
0123
VREF (V)
45
2609 G05
DNL vs VREF
1.5
VCC = 5.5V
1.0
0.5
DNL (POS)
0
DNL (NEG)
–0.5
–1.0
–1.5
012345
VREF (V)
2609 G06
Settling to ±1LSB
Settling of Full-Scale Step
VOUT
100µV/DIV
SCL
2V/DIV
9TH CLOCK
OF 3RD DATA
BYTE
9.7µs
2µs/DIV
VCC = 5V, VREF = 4.096V
1/4 SCALE TO 3/4 SCALE STEP
RL = 2k, CL = 200pF
AVERAGE OF 2048 EVENTS
2609 G07
VOUT
100µV/DIV
SCR
2V/DIV
12.3µs
9TH CLOCK OF
3RD DATA BYTE
5µs/DIV
SETTLING TO ±1LSB
VCC = 5V, VREF = 4.096V
CODE 512 TO 65535 STEP
AVERAGE OF 2048 EVENTS
2609 G08
26091929f
5
5 Page 
BLOCK DIAGRA
www.DataSheet4U.com
REFA 3
VOUTA 4
DAC A
VOUTB
5
REFB 6
DAC B
SCL 8
SDA 9
LTC2609/LTC2619/LTC2629
REFLO
2
GND
1
VCC
16
DAC D
15 REFD
14 VOUTD
CONTROL
LOGIC
32-BIT SHIFT REGISTER
I2C
INTERFACE
DAC C
13 VOUTC
12 REFC
ADDRESS
DECODE
LOGIC
11 CA0
10 CA1
7 CA2
2609 BD
26091929f
11
11 Page | ||
| Páginas | Total 20 Páginas | |
| PDF Descargar | [ Datasheet LTC2629.PDF ] | |
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