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Teilenummer | 6475348 |
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Beschreibung | HD6475348 | |
Hersteller | Hitachi Semiconductor | |
Logo | ||
Gesamt 30 Seiten OMC 932723248
www.DataSheet4U.com
Hitachi Single-Chip Microcomputer
H8/534, H8/536
HD6475348R, HD6435348R
HD6475368R, HD6435368R
HD6475348S, HD6435348S
HD6475368S, HD6435368S
Hardware Manual
ADE-602-038B
6.3.2 DTC Vector Table ···································································································120
ww6w..3D.a3taSLhoeceat4tiUo.ncoomf Register Information in Memory ·························································122
6.3.4 Length of Data Transfer Cycle ················································································122
6.4 Procedure for Using the DTC ····························································································124
6.5 Example ·····························································································································125
Section 7 Wait-State Controller
7.1 Overview ····························································································································127
7.1.1 Features ···················································································································127
7.1.2 Block Diagram ········································································································128
7.1.3 Register Configuration ····························································································128
7.2 Wait-State Control Register ·······························································································129
7.3 Operation in Each Wait Mode ····························································································130
7.3.1 Programmable Wait Mode ······················································································130
7.3.2 Pin Wait Mode ········································································································131
7.3.3 Pin Auto-Wait Mode ·······························································································133
Section 8 Clock Pulse Generator
8.1 Overview ····························································································································135
8.1.1 Block Diagram ········································································································135
8.2 Oscillator Circuit ················································································································135
8.3 System Clock Divider ········································································································139
Section 9 I/O Ports
9.1 Overview ····························································································································141
9.2 Port 1 ··································································································································144
9.2.1 Overview ·················································································································144
9.2.2 Port 1 Registers ·······································································································144
9.2.3 Pin Functions in Each Mode ···················································································147
9.3 Port 2 ··································································································································150
9.3.1 Overview ·················································································································150
9.3.2 Port 2 Registers ·······································································································151
9.3.3 Pin Functions in Each Mode ···················································································152
9.4 Port 3 ··································································································································153
9.4.1 Overview ·················································································································153
9.4.2 Port 3 Registers ·······································································································154
9.4.3 Pin Functions in Each Mode ···················································································155
9.5 Port 4 ··································································································································156
9.5.1 Overview ·················································································································156
9.5.2 Port 4 Registers ·······································································································157
9.5.3 Pin Functions in Each Mode ···················································································158
6 Page A.3 Operation Code Map ··········································································································379
A.4wwIwn.DstarutacStihoenetE4Ux.eccoumtion Cycles ·····························································································384
A.4.1 Calculation of Instruction Execution States ····························································384
A.4.2 Tables of Instruction Execution Cycles ··································································385
Appendix B Register Field
B.1 Register Addresses and Bit Names ····················································································393
B.2 Register Descriptions ·········································································································398
Appendix C I/O Port Schematic Diagrams
C.1 Schematic Diagram of Port 1 ·····························································································437
C.2 Schematic Diagram of Port 2 ·····························································································444
C.3 Schematic Diagram of Port 3 ·····························································································445
C.4 Schematic Diagram of Port 4 ·····························································································446
C.5 Schematic Diagram of Port 5 ·····························································································447
C.6 Schematic Diagram of Port 6 ·····························································································448
C.7 Schematic Diagram of Port 7 ·····························································································450
C.8 Schematic Diagram of Port 8 ·····························································································455
C.9 Schematic Diagram of Port 9 ·····························································································456
Appendix D Memory Maps ·······························································································463
Appendix E Pin States
E.1 Port State of Each Pin State ·······························································································465
E.2 Pin States in Reset State ·····································································································468
Appendix F Timing of Transition to and Recovery from
Hardware Standby Mode················································································475
Appendix G Package Dimensions ····················································································476
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PDF Download | [ 6475348 Schematic.PDF ] |
Teilenummer | Beschreibung | Hersteller |
6475348 | HD6475348 | Hitachi Semiconductor |
Teilenummer | Beschreibung | Hersteller |
CD40175BC | Hex D-Type Flip-Flop / Quad D-Type Flip-Flop. |
Fairchild Semiconductor |
KTD1146 | EPITAXIAL PLANAR NPN TRANSISTOR. |
KEC |
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