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Teilenummer | GM2120 |
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Beschreibung | (GM2110 / GM2120) XGA/SXGA LCD Monitor Controller | |
Hersteller | Genesis | |
Logo | ||
Gesamt 30 Seiten www.DataSheet4U.com
Genesis Microchip Publication
PRELIMINARY DATA SHEET
gm2110 / gm2120
XGA/SXGA LCD Monitor Controller with
Integrated Analog Interface
*** Genesis Microchip Confidential ***
Publication number: C2120-DAT-01C
Publication date: June 2002
Genesis Microchip Inc.
2150 Gold Street, Alviso, P.O. Box 2150, CA USA 95002 Tel: (408) 262-6599 Fax: (408) 262-6365
165 Commerce Valley Dr. West, Thornhill, ON Canada L3T 7V8 Tel: (905) 889-5400 Fax: (905) 889-5422
1096, 12thA Main, Hal II Stage, Indira Nagar, Bangalore-560 008, India, Tel: (91)-80-526-3878, Fax: (91)-80-529-6245
4F, No. 24, Ln 123, Sec 6, Min-Chuan E. Rd., Taipei, Taiwan, ROC Tel: 886-2-2791-0118 Fax: 886-2-2791-0196
143-37 Hyundai Tower, #902, Samsung-dong, Kangnam-gu, Seoul, Korea 135-090 Tel 82-2-553-5693 Fax 82-2-552-4942
Rm2614-2618 Shenzhen Office Tower, 6007 Shennan Blvd, 518040, Shenzhen, Guandong, P.R.C., Tel (0755)386-0101, Fax (0755)386-7874
2-9-5 Higashigotanda, Shinagawa-ku, Tokyo, 141-0022, Japan, Tel 81-3-5798-2758, Fax 81-3-5798-2759
www.genesis-microchip.com / [email protected]
www.DataSheet4U.com
*** Genesis Microchip Confidential ***
gm2110/20 Preliminary Data Sheet
List Of Tables
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Table 6.
Table 7.
Table 8.
Table 9.
Table 10.
Table 11.
Table 12.
Table 13.
Table 14.
Table 15.
Table 16.
Table 17.
Table 18.
Table 19.
Table 20.
Table 21.
Table 22.
Analog Input Port........................................................................................................ 4
RCLK PLL Pins.......................................................................................................... 4
System Interface and GPIO Signals............................................................................ 5
Display Output Port .................................................................................................... 6
Parallel ROM Interface Port ....................................................................................... 7
Output Port.................................................................................................................. 7
Reserved Pins.............................................................................................................. 7
Power Pins for ADC Sampling Clock DDS................................................................ 8
Power Pins for Display Clock DDS............................................................................ 8
I/O Power and Ground Pins ........................................................................................ 9
Core Power and Ground Pins...................................................................................... 9
TCLK Specification .................................................................................................. 13
Pin Connection for RGB Input with HSYNC/VSYNC ............................................ 16
ADC Characteristics ................................................................................................. 17
gm2110/20 GPIOs and Alternate Functions ............................................................. 34
Bootstrap Signals ...................................................................................................... 34
Instruction Byte Map ................................................................................................ 35
Absolute Maximum Ratings ..................................................................................... 38
DC Characteristics .................................................................................................... 39
Maximum Speed of Operation.................................................................................. 40
Display Timing and DCLK Adjustments ................................................................. 40
2-Wire Host Interface Port Timing ........................................................................... 40
June 2002
v C2120-DAT-01C
6 Page www.DataSheet4U.com
*** Genesis Microchip Confidential ***
gm2110/20 Preliminary Data Sheet
Pin Name
RESETn
GPIO0/PWM0
GPIO1/PWM1
GPIO2/PWM2
GPIO3/TIMER1
GPIO4/UART_DI
GPIO5/UART_DO
GPIO6
GPIO7
GPIO8/IRQINn
GPIO9
GPIO10
GPIO11/ROM_WEn
GPIO12/NVRAM_SDA
GPIO13/NVRAM_SCL
GPIO14/DDC_SCL
GPIO15/DDC_SDA
GPIO16/HFSn
GPIO17
GPIO18
GPIO19
GPIO20
GPIO21/IRQn
GPIO22/HCLK
Table 3. System Interface and GPIO Signals
No I/O Description
5I
40 IO
41 IO
42 IO
43 IO
44 IO
45 IO
46 IO
47 IO
39 IO
48 IO
49 IO
50 IO
51 IO
52 IO
6 IO
7
205 IO
1 IO
208 IO
207 IO
206 IO
4 IO
204 IO
Active-low hardware reset signal. The reset signal must be held low for at least 1µS.
[Input, Schmitt trigger (400mV typical hysteresis), 5V-tolerant]
General-purpose input/output signal or PWM0. Open drain option via register setting.
[Bi-directional, Schmitt trigger (400mV typical hysteresis), 5V-tolerant]
General-purpose input/output signal or PWM1. Open drain option via register setting.
[Bi-directional, Schmitt trigger (400mV typical hysteresis), 5V-tolerant]
General-purpose input/output signal or PWM2. Open drain option via register setting.
[Bi-directional, Schmitt trigger (400mV typical hysteresis), 5V-tolerant]
General-purpose input/output signal. Open drain option via register setting. This pin is also
connected to Timer 1 clock input of the OCM.
[Bi-directional, Schmitt trigger (400mV typical hysteresis), 5V-tolerant]
General-purpose input/output signal. Open drain option via register setting. This pin is also
connected to the OCM UART data input signal by programming an OCM register.
[Bi-directional, Schmitt trigger (400mV typical hysteresis), 5V-tolerant]
General-purpose input/output signal. Open drain option via register setting. This pin is also
connected to the OCM UART data output signal by programming an OCM register.
[Bi-directional, Schmitt trigger (400mV typical hysteresis), 5V-tolerant]
General-purpose input/output signal.
[Bi-directional, Schmitt trigger (400mV typical hysteresis), 5V-tolerant]
General-purpose input/output signal.
[Bi-directional, Schmitt trigger (400mV typical hysteresis), 5V-tolerant]
General-purpose input/output signal. This is also active-low interrupt input to OCM and is
directly wired to OCM int_0n.
[Bi-directional, Schmitt trigger (400mV typical hysteresis), 5V-tolerant]
General-purpose input/output signal. Open drain option via register setting.
[Bi-directional, Schmitt trigger (400mV typical hysteresis), 5V-tolerant]
General-purpose input/output signal. Open drain option via register setting.
[Bi-directional, Schmitt trigger (400mV typical hysteresis), 5V-tolerant]
General-purpose input/output signal, or ROM write enable if a programmable FLASH
device is used. Open drain option via register setting.
[Bi-directional Input, Schmitt trigger (400mV typical hysteresis), 5V-tolerant]
General-purpose input/output signals, or 2-wire master serial interface to NVRAM in
standalone mode. Open drain option via register setting.
[Bi-directional Input, Schmitt trigger (400mV typical hysteresis), 5V-tolerant]
General-purpose input/output signals, or 2-wire master serial interface to NVRAM in
standalone mode. Open drain option via register setting.
[Bi-directional Input, Schmitt trigger (400mV typical hysteresis), 5V-tolerant]
General-purpose input/output signal when host port is disabled, or data signal for 2-wire
serial host interface.
[Bi-directional, Schmitt trigger (400mV typical hysteresis), slew rate limited, 5V tolerant]
General-purpose input/output signals.
[Bi-directional, Schmitt trigger (400mV typical hysteresis), 5V-tolerant]
General-purpose input/output signal when host port is disabled, or active-low and open-
drain interrupt output pin.
[Bi-directional, 5V-tolerant]
General-purpose input/output signal when host port is disabled, or clock for 2-wire serial
host interface.
[Bi-directional, Schmitt trigger (400mV typical hysteresis), 5V-tolerant]
June 2002
5 C2120-DAT-01C
12 Page | ||
Seiten | Gesamt 30 Seiten | |
PDF Download | [ GM2120 Schematic.PDF ] |
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