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PDF V4070 Data sheet ( Hoja de datos )

Número de pieza V4070
Descripción Crypto Contactless Identification Device
Fabricantes EM Microelectronic 
Logotipo EM Microelectronic Logotipo



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EM MICROELECTRONIC-MARIN SA
V4070
Crypto Contactless Identification Device
Features
• On Chip Crypto-Algorithm
• Two Way Authentication protocol
• 96 bits of Secret-Key in EEPROM (unreadable)
• 32 bits of fix Device Identification
• 30 bits of USER_MEMORY (UM) with read
access (OTP)
• Secret-Key programmable via CID-Interface
• Lock-Bits to inhibit programming
• Data Transmission performed by Amplitude
Modulation
• Bit Period = 32 periods of carrier frequency
• 200 pF on chip Resonant Capacitor (untrimmed)
• -40 to +85°C Temperature range
• 115 kHz TO 135 kHz Field Frequency
• On chip Rectifier and Voltage Limiter
• No external supply buffer capacitance needed
due to low power consumption
Typical Operating Configuration
Coil 1
L V4070
Coil 2
Typical value of inductance at 125 KHz is 8 mH
Figure 1
Description
The V4070 is a CMOS integrated circuit intended for
use in electronic Read/Write RF Transponders. The
chip contains an implementation of a crypto-algorithm
with 96 Bits of user configurable secret-key contained
in EEPROM. It also provides a unique Device Identi-
fication of 32 Bits that can never be modified as well
as 30 Bits of freely programmable USER-MEMORY.
Bits 15 and 14 of word 1 are used as Lock-Bits. The
memory can only be accessed for writing or erasing if
these two bits have the contents «10» as when they
are delivered.
The V4070 transmits data to the transceiver by modu-
lating the amplitude of the electromagnetic field, and
receives data and commands in a similar way.
The coil of the tuned circuit is the only external com-
ponent required, all remaining functions are integrated
in the chip.
Pin Assignment
COIL 1
COIL 2
V4070
COIL1
COIL2
coil terminal / clock input
coil terminal
Figure 2
Applications
• High security automotive immobilizer
• High security hands-free access control
1

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V4070 pdf
EM MICROELECTRONIC-MARIN SA
V4070
Memory Map
Bit15
word 9 Crypt Key 95
Bit 31
8 Crypt Key 79
7 Crypt Key 63
6 Crypt Key 47
Bit0
Crypt Key 80
Bit
Crypt Key064
Crypt Key 48
Crypt Key 32
Commands
COMMAND BITS
001 1
010 1
011 0
101 0
FUNCTION
ID-MODE
UM-MODE
AUTHENTICATION
WRITE WORD
5 Crypt Key 31
Crypt Key 16
4 Crypt Key 15
3 ID 31
Crypt Key 0
ID 16
First bit Parity bit
Recieved
Figure 6
2 ID 15
ID 0
1 LB1,LB0,UM 29
UM 16
0 UM 15
UM 0
Figure 5
Standby Mode
After a Power-On Reset and upon completion of a
command, the chip will execute the Standby Mode, in
which it will continuously send LIWs to allow the reader
to issue commands. As every LIW has a duration of
160 periods of the RF field the reader can turn to Re-
ceive mode every 1.3ms at 125kHz.
ID Mode
After reception of the command including the parity
the chip sends a header consisting of 12 manchester
coded ‘1’s followed by 4 manchester coded ‘0’s. Then
the chip sends the 32 Bits of ID contained in words 3
and 2 of the EEPROM once, without parity, starting
with the MSB of word 3. After completion the chip
returns to Standby-Mode.
ID Mode
OUTPUT
LIW
t rID
Header
11111111111100D31-D LIW
INPUT
RM Comman
Receive Mode
To change from Standby Mode to another operation
the chip has to be brought into Receive Mode. To do
this the Transceiver sends to the chip the RM pattern
during the 32 clocks of modulated phase in a Listen
Window (LIW). The V4070 will stop sending data upon
reception of a valid RM. The RM pattern consists of 2
bits “0” sent by the transceiver. The first “0” is to be
detected during the 32 periods when the modulation
is “ON” in the LIW.
Next the V4070 expects a command to specify the
operation to be executed.
Commands
The commands are composed of 4 bits, divided into 3
data bits and 1 even parity bit (total amount of “1’s” is
even including the parity bit). There exist 4 different
commands. Upon reception of an unknown command
or a command with wrong parity the chip will immedi-
ately return into Standby Mode.
1 bit - 32 T0 periods
Data
Coded Data
T0 = Period of RF carrier frequency
Figure 7
UM-MODE
In UM-MODE the chip sends LB1 and LB0 followed
by the 30 Bits of UM starting with the MSB following
the same procedure as in ID-MODE. After completion
the chip returns to Standby Mode.
5

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