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33395 Schematic ( PDF Datasheet ) - Freescale Semiconductor

Teilenummer 33395
Beschreibung Three-Phase Gate Driver IC
Hersteller Freescale Semiconductor
Logo Freescale Semiconductor Logo 




Gesamt 16 Seiten
33395 Datasheet, Funktion
www.DFaretaeSshceeatl4eUS.ceommiconductor
Technical Data
Three-Phase Gate Driver IC
The 33395 simplifies the design of high-power BLDC motor control
design by combining the gate drive, charge pump, current sense, and
protection circuitry necessary to drive a three-phase bridge
configuration of six N-channel power MOSFETs. Mode logic is
incorporated to route a pulse width modulation (PWM) or a
complementary PWM output signal to either low-side or high-side
MOSFETs of the bridge.
Detection and drive circuitry are also incorporated to control a
reverse battery protection high-side MOSFET switch. PWM
frequencies up to 28 kHz are possible. Built-in protection circuitry
prevents damage to the MOSFET bridge as well as the drive IC and
includes overvoltage shutdown, overtemperature shutdown,
overcurrent shutdown, and undervoltage shutdown.
The device is parametrically specified over ambient temperature
range of -40°C TA 125°C and 5.5 V VIGN 24 V supply.
Features
• Drives Six N-Channel Low RDS(ON) Power MOSFETs
• Built-In Charge Pump Circuitry
• Built-In Current Sense Comparator and Output Drive Current
Limiting
• Built-In PWM Mode Control Logic
• Built-In Circuit Protection
• Designed for Fractional to Integral HP BLDC Motors
• 32-Pin SOIC Wide Body Surface Mount Package
• 33395 Incorporates a <5.0 µs Shoot-Through Suppression Timer
• 33395T Incorporates a <1.0 µs Shoot-Through Suppression Timer
• Pb-Free Packaging Designated by Suffix Code EW
Document Number: MC33395
Rev 4.0, 2/2007
33395
33395T
THREE-PHASE
GATE DRIVER IC
DWB SUFFIX
EW SUFFIX (Pb-FREE)
98ARH99137A
32-PIN SOICW
ORDERING INFORMATION
Device
Temperature
Range (TA)
Package
MC33395DWB/R2
32 SOICW
MC33395EW/R2
MCZ33395EW/R2 -40°C to 125°C
MC33395TDWB/R2
32 SOICW
(Pb-Free)
32 SOICW
MC33395TEW/R2
32 SOICW
(Pb-Free)
VPWR
VDD
3
2
MCU
3
33395
VGDH
VIGN
VDD
CP1H
CP1L
CP2H
CP2L
CRES
VIGNP
GDH1
GDH2
GDH3
SRC1
SRC2
SRC3
HSE1–3
MODE0–1 GDL1
PWM
GDL2
LSE1–3
GDL3
-ISENS
AGND
PGND +ISENS
VDD
NH
SS
NH
Figure 1. 33395 Simplified Application Diagram
* This document contains certain information on a new product.
Specifications and information herein are subject to change without notice.
© Freescale Semiconductor, Inc., 2007. All rights reserved.






33395 Datasheet, Funktion
ELECTRICAL CHARACTERISTICS
STATIC ELECTRICAL CHARACTERISTICS
STATIC ELECTRICAL CHARACTERISTICS
Table 3. Static Electrical Characteristics
Characteristics noted under conditions -40°C TA 125°C, 5.5 V VIGNP 24 V unless otherwise noted. Typical values reflect
approximate parameter mean at TA = 25°C under normal conditions unless otherwise noted.
Characteristic
Symbol
Min
Typ Max Unit
POWER INPUT
VIGN Current @ 5.5 V–24 V, VDD = 5.5 V
VIGNP Current @ 5.5 V–24 V, VDD = 5.5 V
VIGNP Overvoltage Shutdown
VIGNP Voltage
VDD Current @ 5.5 VDC, 5.5 V VIGNP 24 V
VDD Low-Voltage Reset Level
VDD One-Time Fuse (Logic Supply)
IIGN
IIGNP
VIGNPSD
VIGNP
IVDD
VDD(RESET)
25
5.5
2.5
7.0
0.2 1.0 mA
– 100 mA
33 36.5 V
– 24 V
1.8 4.0 mA
3.2 4.0 V
– –V
INPUT / OUTPUT
Input Current at VDD = 5.5 V
LSEn, HSEn, PWM, and MODEn = 3.0 V
IIN µA
5.0 12 25
Input Threshold at VDD = 5.5 V
LSEn, HSEn, PWM, and MODEn (4)
VTH V
1.0 2.0 3.0
VSCRn Source Sense Voltage
SRC1, SRC2, SRC3
Comparator Input Offset Voltage
Comparator Input Bias Current
Comparator Input Offset Current
Common Mode Voltage (5)
Comparator Differential Input Voltage (5)
Charge Pump Voltage VIGN (6)
VIGNP = 5.5 V, ICRES = 1.0 mA
VIGNP = 9.0 V, ICRES = 1.0 mA
VIGNP = 12 V, ICRES = 5.0 mA
VIGNP = 24 V, ICRES = 1.0 mA
VIGNP = 24 V, ICRES = 5.0 mA
VSCRn
VINP(OFFSET)
VINP(BIAS)
IINP(OFFSET)
VCMR
VINPdiff
VCRES - VIGNP
-0.3
5.0
-500
-300
0
-VDD
4.0
4.0
4.5
8.0
4.5
VIGNP
14
-170
-3.0
6.0
7.5
10
16
12
24
20
500
300
VDD - 2.0
+VDD
18
18
18
18
18
V
mV
nA
nA
VDC
V
V
VGDH Output Voltage with GDHn in ON State
VGDHn(on) - V SRCn
V
VIGNP = 5.5 V, IGDHn = 1.0 mA
4.0 5.2 18
VIGNP = 12 V, IGDHn = 5.0 mA
4.0 9.0 18
VIGNP = 24 V, IGDHn = 5.0 mA
4.5 11 18
VGDH Output Voltage with GDHn in OFF State
VIGNP = SRCn = 14 V, IGDHn = 1.0 mA
VGDHn(off)
V
-1.0 0.6 1.0
Notes
4. Logic inputs LSEn, HSEn, PWM, and MODEn have internal 20 µA internal sinks.
5. Guaranteed by design and characterization. Not production tested.
6. The Charge Pump has a positive temperature coefficient. Therefore the Min’s occur at -40°C, Typ’s at 25°C, and Max’s at 125°C.
33395
6
Analog Integrated Circuit Device Data
Freescale Semiconductor

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33395 pdf, datenblatt
FUNCTIONAL DEVICE OPERATION
OPERATIONAL MODES
FUNCTIONAL DEVICE OPERATION
OPERATIONAL MODES
Table 5. Truth Table
The logic state of each output pair, GDLn and GDHn (n = 1, 2, 3), is a function of its corresponding input pair, LSEn and HSEn
(n = 1, 2, 3), along with the logic states of the MODEn and PWM inputs and the internally set overtemperature shutdown (OT),
overvoltage (OV), and current limit (CL) bits provided in this table.
NORMAL OPERATION
Switching Modes
Internally Set Bits
Input Pairs
(e.g., LSE2 and HSE2)
Output Pairs
(e.g., GDL2 and GDH2)
MODE1
0
0
MODE0
0
0
OT OV CL
000
000
LSEn
0
0
HSEn
0
1
GDLn
0
0
GDHn
0
1
0 0 0 0 0 1 0 PWM 0
0 0 000 1 1 0 0
0 1 000 0 0 0 0
0 1 000 0 1 0 1
0
1 000 1
0
PWM
PWM
0 1 000 1 1 0 0
1 0 000 0 0 0 0
1 0 0 0 0 0 1 0 PWM
1 0 000 1 0 1 0
1 0 000 1 1 0 0
1 1 000 0 0 0 0
1
1 000 0
1
PWM
PWM
1 1 000 1 0 1 0
1 1 000 1 1 0 0
FAULT MODE OPERATION
Switching Modes
MODE1
MODE0
Internally Set Bits
OT OV CL
Input Pairs
(e.g., LSE2 and HSE2)
LSEn
HSEn
Output Pairs
(e.g., GDL2 and GDH2)
GDLn
GDHn
0 0 001 0 0 0 0
0 0 001 0 1 0 1
0 0 001 1 0 0 0
0 0 001 1 1 0 0
0 1 001 0 0 0 0
0 1 001 0 1 0 1
0 1 001 1 0 0 1
0 1 001 1 1 0 0
1 0 001 0 0 0 0
1 0 001 0 1 0 0
1 0 001 1 0 1 0
1 0 001 1 1 0 0
1 1 001 0 0 0 0
1 1 001 0 1 1 0
1 1 001 1 0 1 0
1 1 001 1 1 0 0
x x x1x x x 0 0
x x 1xx x x 0 0
33395
12
Analog Integrated Circuit Device Data
Freescale Semiconductor

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