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Teilenummer | 33394 |
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Beschreibung | Switch Mode Power Supply | |
Hersteller | Freescale Semiconductor | |
Logo | ||
Gesamt 30 Seiten www.DataSheet4U.com
Freescale Semiconductor,OIrdnercth.is document from Analog Marketing
Rev. 2.5, 11/2002
Switch Mode Power Supply with
Multiple Linear Regulators and
High Speed CAN Transceiver
The 33394 is a multi–output power supply integrated circuit with high
speed CAN transceiver. The IC incorporates a switching pre–regulator
operating over a wide input voltage range from +4.0V to +26.5V (with
transients up to 45V).
The switching regulator has an internal 3.0A current limit and runs in both
buck mode or boost mode to always supply a pre–regulated output followed
by Low Drop Out (LDO) regulators: VDDH / 5.0V @ 400mA; VDD3_3 / 3.3V
@ 120mA; VDDL / 2.6V (User scalable between 3.3V – 1.25V) @ 400mA
typically, using an external NPN pass transistor. The Keep Alive regulator
VKAM (scalable) @ 50mA; FLASH memory programming voltage VPP /
5.0V or 3.3V @ 150mA; three sensor supply outputs VREF(1,2,3) / 5.0V
(tracking VDDH) @ 100mA each; and a switched battery output (VSEN) to
supply 125mA clamped to 17V.
Additional features include Active Reset circuitry watching VDDH,
VDD3_3, VDDL and VKAM, user selectable Hardware Reset Timer (HRT),
Power Sequencing circuitry guarantees the core supply voltages never
exceed their limits or polarities during system power up and power down.
A high speed CAN transceiver physical layer interfaces between the
microcontroller CMOS outputs and differential bus lines. The CAN driver is
short circuit protected and tolerant of loss of battery or ground conditions.
33394 is designed specifically to meet the needs of modules, which use
the MPC565 microcontroller, though it will also support others from the
MPC5XX family of Motorola microcontrollers.
Features:
• Wide operating input voltage range: +4.0V to +26.5V (+45V transient).
• Provides all regulated voltages for MPC5XX MCUs and other ECU’s
logic and analog functions.
• Accurate power up/down sequencing.
• Provides necessary MCU support monitoring and fail–safe support.
• Provides three 5.0 V buffer supplies for internal & external (short–circuit
protected) sensors.
• Includes step–down/step–up switching regulator to provide supply
voltages during different battery conditions.
• Interfaces Directly to Standard 5.0V I/O for CMOS Microprocessors by
means of Serial Peripheral Interface.
PIN CONNECTIONS
GND
SW2G
BOOT
SW1
SW1
SW1
VBAT
VBAT
KA_VBAT
VIGN
VKAM
1
QFN
TOP VIEW
VBAT
VBAT
KA_VBAT
VIGN
/SLEEP
HRT
CANH
CANL
GND
CANTXD
CANRXD
/PORESET
/HRESET
/PRERESET
VDDL_FB
VKAM
VKAM_FB
VSEN
REGON
WAKEUP
VREF1
VPP_EN
VPP
VDD3_3
VDD3_3FB
VDDL_X
VDDL_B
VDDL_FB
/PRERESET
/HRESET
/PORESET
CANRXD
CANTXD
1
HSOP
SW1
SW1
SW1
BOOT
SW2G
GND
INV
VCOMP
VPRE
VPRE_S
VDDH
VREF2
VREF3
DO
SCLK
DI
CS
/SLEEP
HRT
CANH
CANL
GND
33394
MULTI–OUTPUT
POWER SUPPLY
SEMICONDUCTOR
TECHNICAL DATA
44–Lead HSOP
DH SUFFIX
CASE 1291
44–Lead QFN
FC SUFFIX
CASE 1310
(BOTTOM VIEW)
54–Lead SOICW–EP
DWB SUFFIX
CASE 1377
PIN CONNECTIONS
GND
CANL
CANH
HRT
/SLEEP
N/C
CS
DI
SCLK
DO
N/C
VREF3
VREF2
VDDH
VPRE_S
VPRE
VCOMP
INV
GND
SW2G
BOOT
N/C
SW1
SW1
SW1
SW1
SW1
1
SOICW
CANTXD
CANRXD
/PORESET
/HRESET
/PRERESET
N/C
VDDL_FB
VDDL_B
VDDL_X
VDD3_3FB
VDD3_3
VPP
VPP_EN
VREF1
WAKEUP
REGON
VSEN
VKAM_FB
VKAM
VIGN
N/C
KA_VBAT
VBAT
VBAT
VBAT
VBAT
VBAT
This document contains information on a new product. Specifications
and information herein are subject to change without notice.
© Motorola, Inc. 2002
MOTOROLA ANALOG
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1. MAXIMUM RATINGS (Maximum Ratings indicate sustained limits beyond which damage to the device may occur.
Voltage parameters are absolute voltages referenced to ground.)
Parameter
Min.
Max.
Unit
Supply Voltage (VBAT), Load Dump
–0.3 +45 V
Supply Voltage (KA_VBAT, VIGN), Load Dump
–18 +45 V
Supply Voltages (VDDH, VPP, VDD3_3, VDDL, VKAM)
–0.3 +5.8 V
Supply Voltages (VREF1, VREF2, VREF3, VSEN)
–2.0 +18 V
CANL, CANH (0<VBAT<18 VDC no time limit)
–18
+26.5
V
ESD Voltage
Human Body Model all pins
Machine Model all pins
(Note 1)
(Note 2)
–2.0
–200
+2.0
+200
kV
V
CANLesd, CANHesd
(Note 1)
–4.0
+4.0 kV
CANLesd, CANHesd
(Note 2)
–200
+200
V
CANLtransient, CANHtransient
(Note 3)
–200
+200
V
/SLEEP
–18 +45 V
REGON, VPP_EN, /HRESET, /PORESET, /PRERESET, HRT, DO, DI, CS, SCLK
–0.3 +7.0 V
CANTXD, CANRXD
–0.3 +7.0 V
Operational Package Temperature [Ambient Temperature]
–40
+125
°C
Storage Temperature
–65
+150
°C
Power Dissipation (TA = 125_C)
44 HSOP
44 QFN
54 SOICW–EP
(Note 4)
(Note 4)
(Note 4)
8.3 W
5.0 W
5.0 W
Lead Soldering Temperature
(Note 5)
260 _C
Maximum Junction Temperature
+150
°C
RθJA, Thermal Resistance, Junction to Ambient (44 HSOP)
(Note 6)
41 °C/W
RθJC, Thermal Resistance, Junction to Case (44 HSOP)
(Note 7)
0.2 °C/W
RθJB, Thermal Resistance, Junction to Base (44 HSOP)
(Note 8)
3 °C/W
RθJA, Thermal Resistance, Junction to Ambient (44 QFN)
(Note 6)
77 °C/W
RθJC, Thermal Resistance, Junction to Case (44 QFN)
(Note 7)
1.7 °C/W
RθJB, Thermal Resistance, Junction to Base (44 QFN)
(Note 8)
5.0 °C/W
RθJA, Thermal Resistance, Junction to Ambient (54 SOICW–EP)
(Note 6)
52 °C/W
RθJC, Thermal Resistance, Junction to Case (54 SOICW–EP)
(Note 7)
1.2 °C/W
RθJB, Thermal Resistance, Junction to Base (54 SOICW–EP)
(Note 8)
8.1 °C/W
1. Human body model: C = 100 pF, R = 1.5 kΩ.
2. Machine model: C = 200 pF, R = 10 Ω and L = 0.75 µH. In case of a discharge from pin CANL to pin GND: – 100 V < CANL transient < +100
V; in case of a discharge from pin CANH to Vcc: –150 V < CANH transient < +150 V.
3. The waveforms of the applied transients is in accordance with ”ISO 7637 part 1” test pulses 1, 2, 3a and 3b.
4. Maximum power dissipation at indicated junction temperature.
5. Lead soldering temperature limit is for 10 seconds maximum duration; contact Motorola Sales Office for device immersion soldering
time/temperature limits.
6. Thermal resistance measured in accordance with EIA/JESD51–2.
7. Theoretical thermal resistance from the die junction to the exposed pad.
8. Thermal resistance measured in accordance with JESD51–8.
2. RECOMMENDED OPERATING CONDITIONS (All voltages are with respect to ground unless otherwise noted)
Parameter
Supply Voltages (VBAT, KA_VBAT)
Switching Regulator Output Current (IVPRE)
VDDH Output Current
(Note 1)
VDD3_3 Output Current
VDDL_B Pass Transistor Base Drive Current
VPP Output Current
VREF Output Current
VSEN Output Current
VKAM Standby Output Current (normal mode of operation)
VKAM Standby Output Current (standby mode of operation)
1. See Typical Application Diagram in Figure 1.
Value
4.0 to 26.5
0 to 1.2
0 to 400
0 to 120
0 to 40
0 to 150
0 to 100
0 to 125
0 to 60
0 to 12
Unit
V
A
mA
mA
mA
mA
mA
mA
mA
mA
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6 Page Freescale Se3m33ic94onductor, Inc.
3. ELECTRICAL CHARACTERISTICS (–40°C ≤ TA ≤ +125°C; +4.0 V ≤ VBAT ≤ +26.5 V using the 33394 typical application
circuit – see Figure 1, unless otherwise noted.)
Characteristic
Symbol
Min.
Typ.
Max.
Unit
DC CHARACTERISTICS:
SUPERVISORY OUTPUTS
Reset Voltage Thresholds
/HRESET to follow /PRERESET by 0.7 µs
VDDH Reset Upper Threshold Voltage
(Note 1)
5.2 V
VDDH Reset Lower Threshold Voltage
(Note 1)
4.8
V
VDD3_3 Reset Upper Threshold Voltage
(Note 1)
3.43 V
VDD3_3 Reset Lower Threshold Voltage
(Note 1)
3.17
V
VDDL Reset Upper Threshold Voltage
(Notes 1, 4)
1.35 V
VDDL Reset Lower Threshold Voltage
(Notes 1, 4)
1.2
V
/PORESET Voltage Threshold
VKAM Reset Upper Threshold Voltage
(Notes 2, 5)
1.35 V
VKAM Reset Lower Threshold Voltage
(Notes 2, 5)
1.2
V
/PRERESET, /HRESET, /PORESET Open Drain Maximum Voltage
(Note 3)
7.0 V
/PRERESET, /HRESET, /PORESET Open Drain Pull–Down Current,
Vreset< 0.4 V
/PRERESET, /HRESET, /PORESET Low–Level Output Voltage,
IOL = 1.0 mA
1.0 mA
0.5 V
/PRERESET /HRESET /PORESET Leakage Current
WAKEUP High–Level Output Voltage, IOH = –800µA
VDDH–0.8
15 µA
V
WAKEUP Low–Level Output Voltage, IOL = 1.6 mA
0.4 V
HRT Voltage Threshold
2.49 2.53 2.57 V
HRT Sink Current
HRT Leakage Current
HRT Saturation Voltage, HRT Current = 1 mA
1.0 mA
5.0 µA
0.4 V
AC CHARACTERISTICS:
SUPERVISORY OUTPUTS
/PORESET Delay
Delay time from VKAM in regulation and stable to the release of
/PORESET
7.0 10 15 ms
Reset Delay Time
Time from fault on VDDH, VDD3_3, VDDL or VKAM to Reset
(/PORESET, /PRERESET)
10 20 50 µs
/HRESET Delay Time
Time From /PRERESET low to /HRESET low
0.5 0.7 1.0 µs
VDDH, VDDL, VREF Power Up Sequence
Max Power Up Sequence Time Dependent on Output Load
Characteristics.
(Note 3)
800
µs
NOTE:
1. VDDH, VDD3_3, VDDL regulator outputs supervised by /PRERESET and /HRESET.
2. VKAM regulator output supervised by /PORESET.
3. Guaranteed by design but not production tested.
4. Measured at the VDDL_FB pin.
5. Measured at the VKAM_FB pin.
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12 Page | ||
Seiten | Gesamt 30 Seiten | |
PDF Download | [ 33394 Schematic.PDF ] |
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