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PDF HT46R73D-1 Data sheet ( Hoja de datos )

Número de pieza HT46R73D-1
Descripción Dual Slope A/D Type MCU
Fabricantes Holtek Semiconductor 
Logotipo Holtek Semiconductor Logotipo



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HT46R73D-1
Dual Slope A/D Type MCU with LCD
Technical Document
· Tools Information
· FAQs
· Application Note
- HA0003E Communicating between the HT48 & HT46 Series MCUs and the HT93LC46 EEPROM
- HA0004E HT48 & HT46 MCU UART Software Implementation Method
- HA0005E Controlling the I2C bus with the HT48 & HT46 MCU Series
- HA0007E Using the MCU Look Up Table Instructions
- HA0049E Read and Write Control of the HT1380
Features
· Operating voltage:
fSYS=4MHz: 2.2V~5.5V
fSYS=8MHz: 3.3V~5.5V
· 12 bidirectional I/O lines and two ADC input
· One external interrupt input shard with an I/O lines
· One 8-bit and one 16-bit programmable timer/event
counter with overflow interrupt a 7-stage pre-scalar
· LCD driver with 16´4, 17´3 or 17´2 segments
· 4K´15 program memory with partial lock function
· 96´8 data memory RAM
· Single differential input channel dual slope Analog to
Digital Converter with Operational Amplifier.
· Watchdog Timer with regulator power
· Buzzer output
· Internal 12kHz RC oscillator
· On-chip RC or crystal oscillator
· HALT function and wake-up feature reduce power
consumption
· Voltage regulator (3.3V) and charge pump
· Embeded voltage reference generator (1.5V)
· 4-level subroutine nesting
· Bit manipulation instruction
· 14-bit table read instruction
· Up to 0.5ms instruction cycle with 8MHz system clock
at VDD=5V
· 63 powerful instructions
· All instructions in 1 or 2 machine cycles
· Low voltage reset/detector function
· 52-pin QFP package
General Description
The HT46R73D-1 is an 8-bit high performance, RISC
architecture microcontroller device specifically de-
signed for A/D with LCD applications that interface di-
rectly to analog signals, such as those from sensors.
The advantages of low power consumption, I/O flexibil-
ity, timer functions, oscillator options, Dual slope A/D
converter, LCD display, HALT and wake-up functions,
watchdog timer, as well as low cost, enhance the versa-
tility of these devices to suit for a wide range of AD with
LCD application possibilities such as sensor signal pro-
cessing, scales, consumer products, subsystem con-
trollers, etc.
Rev. 1.00
1 May 14, 2007

1 page




HT46R73D-1 pdf
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HT46R73D-1
Symbol
Parameter
IOH2
LCD Common and Segment
Current
Test Conditions
VDD Conditions
3V
VOH=0.9VDD
5V
RPH
Pull-high Resistance of I/O Ports 3V
and INT
5V
¾
¾
Charge Pump and Regulator
VCHPI Input Voltage
Charge pump on
¾
Charge pump off
VREGO Output Voltage
¾ No load
VREGDP1
Regulator Output Voltage Drop
(Compare with No Load)
VREGDP2
VDD=3.7V~5.5V
¾ Charge pump off
Current£10mA
VDD=2.4V~3.6V
¾ Charge pump on
Current£6mA
Dual Slope AD, Amplifier and Band Gap
VRFGO
VRFGTC
Reference Generator Output
Reference Generator
Temperature Coefficient
¾ @3.3V
¾ @3.3V
VADOFF Input Offset Range
¾¾
VICMR Common Mode Input Range
¾ Amplifier, no load
¾ Integrator, no load
Min. Typ. Max. Unit
-80
-180
20
10
-160
-360
60
30
¾
¾
100
50
mA
mA
kW
kW
2.2 ¾
3.7 ¾
3 3.3
3.6
5.5
3.6
V
V
V
¾ 100 ¾ mV
¾ 100 ¾ mV
1.45
¾
¾
0.2
1
1.5 1.55
V
50 ¾ Ppm/C
500 800
mV
¾ VDD-1
V
¾ VDD-0.2 V
A.C. Characteristics
Symbol
Parameter
Test Conditions
VDD Conditions
Min.
System Clock (RC OSC)
¾ 2.2V~5.5V
400
fSYS
System Clock (Crystal OSC)
¾ 2.2V~5.5V
¾ 3.3V~5.5V
400
400
fINRC
Internal RC OSC
3V
¾
5V
¾
¾
fTIMER
Timer I/P Frequency
(TMR0/TMR1)
¾ 2.2V~5.5V
0
tWDTOSC Watchdog Oscillator Period
3V
5V
¾
¾
45
32
tRES External Reset Low Pulse Width ¾
¾
1
tSST
System Start-up Timer Period
¾
Power-up or wake-up from
HALT
¾
tLVR Low Voltage Width to Reset
¾
¾
0.25
tINT Interrupt Pulse Width
¾
¾
1
Note: tSYS= 1/fSYS
Typ.
¾
¾
¾
12
15
¾
90
65
¾
1024
1
¾
Ta=25°C
Max. Unit
4000
4000
8000
¾
¾
4000
180
130
¾
¾
2
¾
kHz
kHz
kHz
kHz
kHz
kHz
ms
ms
ms
tSYS
ms
ms
Rev. 1.00
5 May 14, 2007

5 Page





HT46R73D-1 arduino
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HT46R73D-1
If the crystal oscillator is used, a crystal across OSC1
and OSC2 is needed to provide the feedback and phase
shift required for the oscillator. No other external compo-
nents are required. Instead of a crystal, a resonator can
also be connected between OSC1 and OSC2 to get a
frequency reference, but two external capacitors in
OSC1 and OSC2 are required (if the oscillator can be
disabled by options to conserve power).
If an external RC oscillator is used, an external resistor
between OSC1 and VSS is required to achieve oscilla-
tion, the value of which must be between 100kW to
2.4MW. The system clock divided by 4, which can be
monitored on pin OSC2, can be used for external logic
synchronization purposes.
The Internal RC oscillator (Int.RCOSC) is a free running
on-chip RC oscillator, requiring no external compo-
nents. Even if the system enters the Power Down Mode,
and the system clock is stopped, the internal RC oscilla-
tor continues to run with a period of approximately 65ms
at 5V if either the WDT or IRC clock is enabled. The in-
ternal RC oscillator can be disabled by a configuration
option and by clearing the IRCC bit to ²0² to conserve
power.
Watchdog Timer - WDT
The WDT is implemented using a dedicated internal RC
oscillator (Int. RCOSC, note: the WDTOSC described in
this document represents the same oscillator as the
Int.RCOSC) or the instruction clock which is the system
clock/4. The timer is designed to prevent a software mal-
function or sequence from jumping to an unknown loca-
tion with unpredictable results. The watchdog timer can
be disabled by a configuration option. If the watchdog
timer is disabled, the WDT timer will have the same
manner as in the enable-mode except that the timeout
signal will not generate a chip reset. So in the watchdog
timer disable mode, the WDT timer counter can be read
out and can be cleared. This function is used for the ap-
plication program to access the WDT frequency to get
the temperature coefficient for analog component ad-
justment. The WDT oscillator needs to be disabled/en-
abled by the special function registers(WDTC
:WDTOSC), for power saving reasons.
There are 2 registers related to the WDT function,
WDTC and WDTD. The WDTC register can control the
WDT oscillator enable/disable and the WDT power
source. WDTD is the WDT counter readout register.
WDTPWR can be used to choose the WDT power
source, the default source is VOCHP. The main purpose
of the regulator is to be used for the WDT Tempera-
ture-coefficient adjustment. In this case, the application
program should enable the regulator before switching to
the Regulator source. The WDTOSC can be used to en-
able or disable the WDT OSC (12kHz). If the application
does not use the WDT OSC, then it needs to disable it in
order to save power. When WDTOSC is disabled, then it
is actually turned off, regardless of the IRCC setting.
When the WDTOSC is enabled, the Power Down mode
situation will be defined by the IRCC registers.
Bit No.
Label
Function
The WDT Power source selection. (WDTPWR1:0)=
0~1
WDTPWR0~
WDTPWR1
01: WDT power comes from VOCHP
10: WDT power comes from regulator
00/11: WDT power comes from VOCHP strongly recommend use to use 01 for VOCHP
prevent the noise to let the WDT lose the power
2~3
WDTOSC0~
WDTOSC1
The WDT oscillator enable/disable (WDTOSC1:0)=
01: WDT OSC disable10: WDT OSC enable
00/11: WDT OSC enable strongly recommend use to use 10 for WDT OSC enable
4~7 ¾ Reserved
WDTC (1CH) Register
Note: WDTOSC registers initial value will be set to enable (1,0), if both ²WDT option enable² and ²WDT clock option
set to WDT², otherwise, it will be set to disable (0,1)
Bit No.
0~7
Label
Function
WDTPWR0~ The WDT counter data value.
WDTPWR7 This register is read only. It¢s used for temperature adjusting.
WDTD (1DH) Register
The WDT clock (fS1) is further divided by an internal counter to give longer watchdog time-outs., In this device, the divi-
sion ratio can be varied by selecting different configuration options to give 213 to 216 division ration range.
Rev. 1.00
11 May 14, 2007

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