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PDF LM95221 Data sheet ( Hoja de datos )
| Número de pieza | LM95221 | |
| Descripción | Dual Remote Diode Digital Temperature Sensor | |
| Fabricantes | National Semiconductor | |
| Logotipo |  |
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May 2004
www.DataSheet4U.com
LM95221
Dual Remote Diode Digital Temperature Sensor with
SMBus Interface
General Description
The LM95221 is a dual remote diode temperature sensor in
an 8-lead MSOP package. The 2-wire serial interface of the
LM95221 is compatible with SMBus 2.0. The LM95221 can
sense three temperature zones, it can measure the tempera-
ture of its own die as well as two diode connected transis-
tors. The diode connected transistors can be a thermal diode
as found in Pentium and AMD processors or can simply be a
diode connected MMBT3904 transistor. The LM95221 reso-
lution format for remote temperature readings can be pro-
grammed to be 10-bits plus sign or 11-bits unsigned. In the
unsigned mode the LM95221 remote diode readings can
resolve temperatures above 127˚C. Local temperature read-
ings have a resolution of 9-bits plus sign.
The temperature of any ASIC can be accurately determined
using the LM95221 as long as a dedicated diode (semicon-
ductor junction) is available on the target die. The LM95221
remote sensor accuracy of ±1˚C is factory trimmed for a
series resistance of 2.7 ohms and 1.008 non-ideality factor.
Features
n Accurately senses die temperature of remote ICs or
diode junctions
n Remote diode fault detection
n On-board local temperature sensing
n Remote temperature readings:
— 0.125 ˚C LSb
— 10-bits plus sign or 11-bits programmable resolution
— 11-bits resolves temperatures above 127 ˚C
n Local temperature readings:
— 0.25 ˚C
— 9-bits plus sign
n Status register support
n Programmable conversion rate allows user optimization
of power consumption
n Shutdown mode one-shot conversion control
n SMBus 2.0 compatible interface, supports TIMEOUT
n 8-pin MSOP package
Key Specifications
j Local Temperature Accuracy
TA=0˚C to 85˚C
j Remote Diode Temperature Accuracy
TA=30˚C to 50˚C, TD=45˚C to 85˚C
TA=0˚C to 85˚C, TD=25˚C to 140˚C
j Supply Voltage
j Supply Current
±3.0 ˚C (max)
±1.0 ˚C (max)
±3.0 ˚C (max)
3.0 V to 3.6 V
2 mA (typ)
Applications
n Processor/Computer System Thermal Management
(e.g. Laptop, Desktop, Workstations, Server)
n Electronic Test Equipment
n Office Electronics
Simplified Block Diagram
Pentium™ is a trademark of Intel Corporation.
© 2004 National Semiconductor Corporation DS200943
20094301
www.national.com
1 page  
Logic Electrical Characteristics
DIGITAL DC CHARACTERISTICS Unless otherwise noted, these specifications apply for VDD=+3.0 to 3.6 Vdc. Boldface lim-
its apply for TA = TJ = TMIN to TMAX; all other limits TA= TJ=+25˚C, unless otherwise noted.
Symbol
Parameter
Conditions
Typical
Limits
Units
(Note 6)
(Note 7)
(Limit)
SMBDAT, SMBCLK INPUTS
VIN(1)
VIN(0)
VIN(HYST)
Logical “1” Input Voltage
Logical “0”Input Voltage
SMBDAT and SMBCLK Digital Input
Hysteresis
IIN(1)
Logical “1” Input Current
IIN(0)
Logical “0” Input Current
CIN Input Capacitance
SMBDAT OUTPUT
VIN = VDD
VIN = 0 V
400
0.005
−0.005
5
2.1 V (min)
0.8 V (max)
mV
±10 µA (max)
±10 µA (max)
pF
IOH High Level Output Current VOH = VDD
10 µA (max)
VOL SMBus Low Level Output Voltage IOL = 4mA
0.4 V (max)
IOL = 6mA
0.6
SMBus DIGITAL SWITCHING CHARACTERISTICS Unless otherwise noted, these specifications apply for VDD=+3.0 Vdc to
+3.6 Vdc, CL (load capacitance) on output lines = 80 pF. Boldface limits apply for TA = TJ = TMIN to TMAX; all other limits TA
= TJ = +25˚C, unless otherwise noted. The switching characteristics of the LM95221 fully meet or exceed the published specifi-
cations of the SMBus version 2.0. The following parameters are the timing relationships between SMBCLK and SMBDAT sig-
nals related to the LM95221. They adhere to but are not necessarily the SMBus bus specifications.
Symbol
Parameter
Conditions
Typical
Limits
Units
(Note 6) (Note 7)
(Limit)
fSMB SMBus Clock Frequency
100 kHz (max)
10 kHz (min)
tLOW SMBus Clock Low Time
from VIN(0)max to VIN(0)max
4.7 µs (min)
25 ms (max)
tHIGH
tR,SMB
tF,SMB
tOF
tTIMEOUT
SMBus Clock High Time
SMBus Rise Time
from VIN(1)min to VIN(1)min
(Note 12)
SMBus Fall Time
(Note 13)
Output Fall Time
CL = 400pF,
IO = 3mA, (Note 13)
SMBDAT and SMBCLK Time Low for Reset of
Serial Interface (Note 14)
1
0.3
4.0 µs (min)
µs (max)
µs (max)
250 ns (max)
25 ms (min)
35 ms (max)
tSU;DAT Data In Setup Time to SMBCLK High
tHD;DAT Data Out Stable after SMBCLK Low
250 ns (min)
300 ns (min)
900 ns (max)
tHD;STA
Start Condition SMBDAT Low to SMBCLK
Low (Start condition hold before the first clock
falling edge)
100 ns (min)
tSU;STO Stop Condition SMBCLK High to SMBDAT
Low (Stop Condition Setup)
100 ns (min)
tSU;STA SMBus Repeated Start-Condition Setup Time,
SMBCLK High to SMBDAT Low
0.6 µs (min)
tBUF SMBus Free Time Between Stop and Start
Conditions
1.3 µs (min)
5 www.national.com
5 Page 
1.0 Functional Description (Continued)
1.8 SERIAL INTERFACE RESET
In the event that the SMBus Master is RESET while the
LM95221 is transmitting on the SMBDAT line, the LM95221
must be returned to a known state in the communication
protocol. This may be done in one of two ways:
1. When SMBDAT is LOW, the LM95221 SMBus state
machine resets to the SMBus idle state if either SMB-
DAT or SMBCLK are held low for more than 35ms
(tTIMEOUT). Note that according to SMBus specification
2.0 all devices are to timeout when either the SMBCLK
or SMBDAT lines are held low for 25-35ms. Therefore, to
insure a timeout of all devices on the bus the SMBCLK
or SMBDAT lines must be held low for at least 35ms.
2. When SMBDAT is HIGH, have the master initiate an
SMBus start. The LM95221 will respond properly to an
SMBus start condition at any point during the communi-
cation. After the start the LM95221 will expect an SMBus
Address address byte.
1.9 ONE-SHOT CONVERSION
The One-Shot register is used to initiate a single conversion
and comparison cycle when the device is in standby mode,
after which the device returns to standby. This is not a data
register and it is the write operation that causes the one-shot
conversion. The data written to this address is irrelevant and
is not stored. A zero will always be read from this register.
2.0 LM95221 Registers
Command register selects which registers will be read from or written to. Data for this register should be transmitted during the
Command Byte of the SMBus write communication.
P7 P6 P5 P4 P3 P2 P1 P0
Command
P0-P7: Command
Name
Status Register
Configuration Register
1-shot
Local Temperature MSB
Remote Temperature 1 MSB
Remote Temperature 2 MSB
Local Temperature LSB
Remote Temperature 1 LSB
Remote Temperature 2 LSB
Manufacturer ID
Revision ID
Command
(Hex)
02h
03h
Register Summary
Power-On
Default Value
(Hex)
-
00h
Read/Write
RO
R/W
0Fh - WO
10h - RO
11h - RO
12h - RO
20h - RO
21h - RO
22h - RO
FEh 01h RO
FFh 61h RO
# of used
bits
3
4
-
8
8
8
2
3
3
Comments
2 status bits and 1 busy bit
Includes conversion rate
control
Activates one conversion for
all 3 channels if the chip is in
standby mode (i.e.
RUN/STOP bit = 1). Data
transmitted by the host is
ignored by the LM95221.
All unused bits will report zero
All unused bits will report zero
All unused bits will report zero
11 www.national.com
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| Páginas | Total 16 Páginas | |
| PDF Descargar | [ Datasheet LM95221.PDF ] | |
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