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LTC2620 Schematic ( PDF Datasheet ) - Linear Technology

Teilenummer LTC2620
Beschreibung (LTC2600 - LTC2620) 3V/5V Octal 12-bit Rail-to-rail DAC
Hersteller Linear Technology
Logo Linear Technology Logo 



Gesamt 16 Seiten
		
LTC2620 Datasheet, Funktion
LTC2600/LTC2610/LTC2620
FEATURES
Octal 16-/14-/12-Bit
Rail-to-Rail DACs in 16-Lead SSOP
DESCRIPTIO
s Smallest Pin Compatible Octal DACs:
LTC2600: 16 Bits
LTC2610: 14 Bits
LTC2620: 12 Bits
s Guaranteed 16-Bit Monotonic Over Temperature
s Tiny 16-Lead Narrow SSOP Package
s Wide 2.5V to 5.5V Supply Range
s Low Power Operation: 250µA per DAC at 3V
s Individual Channel Power-Down to 1µA, Max
s Ultralow Crosstalk between DACs (<10µV)
s High Rail-to-Rail Output Drive (±15mA, Min)
s Double-Buffered Digital Inputs
s Pin-Compatible 10-/8-Bit Versions
(LTC1660/LTC1665)
U
APPLICATIO S
s Mobile Communications
www.DataSheet4U.csom Process Control and Industrial Automation
s Instrumentation
s Automatic Test Equipment
The LTC®2600/LTC2610/LTC2620 are octal 16-, 14- and
12-bit, 2.5V-to-5.5V rail-to-rail voltage-output DACs in
16-lead narrow SSOP packages. They have built-in high
performance output buffers and are guaranteed mono-
tonic.
These parts establish new board-density benchmarks for
16- and 14-bit DACs and advance performance standards
for output drive, crosstalk and load regulation in single-
supply, voltage-output multiples.
The parts use a simple SPI/MICROWIRETM compatible
3-wire serial interface which can be operated at clock rates
up to 50MHz. Daisy-chain capability and a hardware CLR
function are included.
The LTC2600/LTC2610/LTC2620 incorporate a power-on
reset circuit. During power-up, the voltage outputs rise
less than 10mV above zero scale; and after power-up, they
stay at zero scale until a valid write and update take place.
, LTC and LT are registered trademarks of Linear Technology Corporation.
MICROWIRE is a trademark of National Semiconductor Corporation.
BLOCK DIAGRA
GND 1
VOUT A 2
DAC A
DAC H
16 VCC
15 VOUT H
VOUT B 3
DAC B
VOUT C 4
DAC C
VOUT D 5
REF 6
CS/LD 7
SCK 8
DAC D
CONTROL
LOGIC
DECODE
32-BIT SHIFT REGISTER
DAC G
14 VOUT G
DAC F
13 VOUT F
DAC E
12 VOUT E
11 CLR
10 SDO
9 SDI
2600 BD
Differential Nonlinearity (LTC2600)
1.0
VCC = 5V
0.8 VREF = 4.096V
0.6
0.4
0.2
0
–0.2
–0.4
–0.6
–0.8
–1.0
0
16384
32768
CODE
49152 65535
2600 G21
2600f
1






LTC2620 Datasheet, Funktion
LTC2600/LTC2610/LTC2620
TYPICAL PERFOR A CE CHARACTERISTICS
LTC2600/LTC2610/LTC2620
Supply Current vs Logic Voltage
2.4
VCC = 5V
2.3 SWEEP SCK, SDI
AND CS/LD
2.2 0V TO VCC
2.1
2.0
1.9
1.8
1.7
1.6
1.5
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5
LOGIC VOLTAGE (V)
2600 G13
Exiting Power-Down to Midscale
VCC = 5V
VREF = 2V
VOUT
0.5V/DIV
CS/LD
5V/DIV
2.5µs/DIV
2600 G14
Multiplying Bandwidth
0
–3
–6
–9
www.DataSheet4U.com
–12
–15
–18
–21
–24
–27
VCC = 5V
VREF (DC) = 2V
–30 VREF (AC) = 0.2VP-P
–33 CODE = FULL SCALE
–36
1k
10k 100k
FREQUENCY (Hz)
Output Voltage Noise,
0.1Hz to 10Hz
VOUT
10µV/DIV
1M
2600 G16
0 1 2 3 4 5 6 7 8 9 10
SECONDS
2600 G17
Short-Circuit Output Current vs
VOUT (Sourcing)
0mA
Hardware CLR
VOUT
1V/DIV
CLR
5V/DIV
1µs/DIV
2600 G25
Short-Circuit Output Current vs
VOUT (Sinking)
0mA
VCC = 5.5V
VREF = 5.6V
CODE = 0
VOUT SWEPT 0V TO VCC
1V/DIV
2600 G18
6
VCC = 5.5V
VREF = 5.6V
CODE = FULL SCALE
VOUT SWEPT VCC TO 0V
1V/DIV
2600 G19
2600f

6 Page







LTC2620 pdf, datenblatt
LTC2600/LTC2610/LTC2620
U
OPERATIO
DC output impedance is equivalent to load regulation, and
may be derived from it by simply calculating a change in
units from LSB/mA to Ohms. The amplifiers’ DC output
impedance is 0.025when driving a load well away from
the rails.
When drawing a load current from either rail, the output
voltage headroom with respect to that rail is limited by the
25typical channel resistance of the output devices; e.g.,
when sinking 1mA, the minimum output voltage = 25
1mA = 25mV. See the graph Headroom at Rails vs Output
Current in the Typical Performance Characteristics sec-
tion.
The amplifiers are stable driving capacitive loads of up to
1000pF.
www.DataSheet4U.com
Board Layout
The excellent load regulation and DC crosstalk perfor-
mance of these devices is achieved in part by keeping
“signal” and “power” grounds separated internally and by
reducing shared internal resistance to just 0.005.
The GND pin functions both as the node to which the
reference and output voltages are referred and as a return
path for power currents in the device. Because of this,
careful thought should be given to the grounding scheme
and board layout in order to ensure rated performance.
The PC board should have separate areas for the analog
and digital sections of the circuit. This keeps digital signals
away from sensitive analog signals and facilitates the use
of separate digital and analog ground planes which have
minimal capacitive and resistive interaction with each
other.
Digital and analog ground planes should be joined at only
one point, establishing a system star ground as close to
the device’s ground pin as possible. Ideally, the analog
ground plane should be located on the component side of
the board, and should be allowed to run under the part to
shield it from noise. Analog ground should be a continu-
ous and uninterrupted plane, except for necessary lead
pads and vias, with signal traces on another layer.
12
2600f

12 Page


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