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PDF LTC2622 Data sheet ( Hoja de datos )
| Número de pieza | LTC2622 | |
| Descripción | (LTC2602 - LTC2622) Rail-to-rail DACs | |
| Fabricantes | Linear Technology | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de LTC2622 (archivo pdf) en la parte inferior de esta página. Total 16 Páginas | ||
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LTC2602/LTC2612/LTC2622
Dual 16-/14-/12-Bit
Rail-to-Rail DACs in 8-Lead MSOP
FEATURES
s Smallest Pin-Compatible Dual DACs:
LTC2602: 16-Bits
LTC2612: 14-Bits
LTC2622: 12-Bits
s Guaranteed 16-Bit Monotonic Over Temperature
s Wide 2.5V to 5.5V Supply Range
s Low Power Operation: 300µA per DAC at 3V
s Individual Channel Power-Down to 1µA, Max
s Ultralow Crosstalk between DACs (30µV)
s High Rail-to-Rail Output Drive (±15mA)
s Double-Buffered Data Latches
s Pin-Compatible 10-Bit Version (LTC1661)
s Tiny 8-Lead MSOP Package
U
APPLICATIO S
www.DataSheet4U.com
s Mobile Communications
s Process Control and Industrial Automation
s Instrumentation
s Automatic Test Equipment
DESCRIPTIO
The LTC®2602/LTC2612/LTC2622 are dual 16-,14- and
12-bit, 2.5V-to-5.5V rail-to-rail voltage-output DACs, in a
tiny 8-lead MSOP package. They have built-in high per-
formance output buffers and are guaranteed monotonic.
These parts establish advanced performance standards
for output drive, crosstalk and load regulation in single-
supply, voltage output multiples.
The parts use a simple SPI/MICROWIRE™ compatible
3-wire serial interface which can be operated at clock
rates up to 50MHz.
The LTC2602/LTC2612/LTC2622 incorporate a power-
on reset circuit. During power-up, the voltage outputs
rise less than 10mV above zero scale, and after power-
up, they stay at zero scale until a valid write and update
take place.
, LTC and LT are registered trademarks of Linear Technology Corporation.
MICROWIRE is a trademark of National Semiconductor Corporation.
BLOCK DIAGRA
LTC2602
VOUT A 8
16-BIT
DAC A
GND 7
CS/LD 1
SCK 2
CONTROL
LOGIC
DECODE
24-BIT SHIFT REGISTER
16-BIT
DAC B
5 VOUT B
6 VCC
4 REF
3 SDI
2602 BD01
Differential Nonlinearity (DNL)(LTC2602)
1.0
VCC = 5V
0.8 VREF = 4.096V
0.6
0.4
0.2
0
–0.2
–0.4
–0.6
–0.8
–1.0
0
16384
32768
CODE
49152 65535
2602 TA01
2602f
1
1 page  
LTC2602/LTC2612/LTC2622
TYPICAL PERFOR A CE CHARACTERISTICS
(LTC2602)
DNL vs Temperature
1.0
0.8 VCC = 5V
0.6 VREF = 4.096V
0.4
DNL (POS)
0.2
0
–0.2
DNL (NEG)
–0.4
–0.6
–0.8
–1.0
–50 –30 –10 10 30 50
TEMPERATURE (°C)
70 90
2602 G23
INL vs VREF
32
24 VCC = 5.5V
16
8 INL (POS)
0
–8 INL (NEG)
–16
–24
–32
0123
VREF (V)
45
2602 G24
DNL vs VREF
1.5
VCC = 5.5V
1.0
0.5
DNL (POS)
0
DNL (NEG)
–0.5
–1.0
–1.5
012345
VREF (V)
2602 G25
Settling to ±1LSB
Settling of Full-Scale Step
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VOUT
100µV/DIV
CS/LD
2V/DIV
9.7µs
VOUT
100µV/DIV
CS/LD
2V/DIV
12.3µs
2µs/DIV
VCC = 5V, VREF = 4.096V
1/4-SCALE TO 3/4-SCALE STEP
RL = 2k, CL = 200pF
AVERAGE OF 2048 EVENTS
2602 G26
5µs/DIV
VCC = 5V, VREF = 4.096V
CODE 512 TO 65535 STEP
AVERAGE OF 2048 EVENTS
SETTLING TO ±1LSB
2602 G27
(LTC2612)
Integral Nonlinearity (INL)
8
VCC = 5V
6 VREF = 4.096V
4
2
0
–2
–4
–6
–8
0
4096
8192
CODE
12288 16383
2602 G28
Differential Nonlinearity (DNL)
Settling to ±1LSB
1.0
VCC = 5V
0.8 VREF = 4.096V
0.6
0.4 VOUT
0.2 100µV/DIV
0
–0.2 CS/LD
2V/DIV
8.9µs
–0.4
–0.6
–0.8
–1.0
0
4096
8192
CODE
12288 16383
2µs/DIV
VCC = 5V, VREF = 4.096V
1/4-SCALE TO 3/4-SCALE STEP
RL = 2k, CL = 200pF
AVERAGE OF 2048 EVENTS
2602 G29
2602 G30
2602f
5
5 Page 
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OPERATIO
INPUT WORD (LTC2602)
COMMAND
ADDRESS
LTC2602/LTC2612/LTC2622
DATA (16 BITS)
C3 C2 C1 C0 A3 A2 A1 A0 D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
INPUT WORD (LTC2612)
MSB
LSB
2602 TBL01
COMMAND
ADDRESS
DATA (14 BITS + 2 DON’T-CARE BITS)
C3 C2 C1 C0 A3 A2 A1 A0 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 X X
INPUT WORD (LTC2622)
MSB
LSB
2602 TBL02
COMMAND
ADDRESS
DATA (12 BITS + 4 DON’T-CARE BITS)
C3 C2 C1 C0 A3 A2 A1 A0 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 X X X X
MSB
LSB
2602 TBL03
output pins are passively pulled to ground through indi-
vidual 90kΩ resistors. Input- and DAC-register contents
arewww.DataSheet4U.com not disturbed during power-down.
Either channel or both channels can be put into power-
down mode by using command 0100b in combination with
the appropriate DAC address, (n). The 16-bit data word is
ignored. The supply and reference currents are reduced by
approximately 50% for each DAC powered down; the
effective resistance at REF (pin 4) rises accordingly,
becoming a high-impedance input (typically > 1GΩ) when
both DACs are powered down.
Normal operation can be resumed by executing any com-
mand which includes a DAC update, as shown in Table 1.
The selected DAC is powered up as its voltage output is
updated. When a DAC which is in a powered-down state is
powered up and updated, normal settling is delayed. If one
of the two DACs is in a powered-down state prior to the
update command, the power-up delay is 5µs. If, on the
other hand, both DACs are powered down, then the main
bias generation circuit block has been automatically shut
down in addition to the individual DAC amplifiers and
reference inputs. In this case, the power up delay time is
12µs (for VCC = 5V) or 30µs (for VCC = 3V).
Voltage Outputs
Each of the two rail-to-rail amplifiers contained in these
parts has guaranteed load regulation when sourcing or
sinking up to 15mA at 5V (7.5mA at 3V).
Load regulation is a measure of the amplifier’s ability to
maintain the rated voltage accuracy over a wide range of
load conditions. The measured change in output voltage
per milliampere of forced load current change is ex-
pressed in LSB/mA.
DC output impedance is equivalent to load regulation, and
may be derived from it by simply calculating a change in
units from LSB/mA to Ohms. The amplifiers’ DC output
impedance is 0.050Ω when driving a load well away from
the rails.
When drawing a load current from either rail, the output
voltage headroom with respect to that rail is limited by the
25Ω typical channel resistance of the output devices; e.g.,
when sinking 1mA, the minimum output voltage = 25Ω •
1mA = 25mV. See the graph Headroom at Rails vs Output
Current in the Typical Performance Characteristics sec-
tion.
The amplifiers are stable driving capacitive loads of up to
1000pF.
2602f
11
11 Page | ||
| Páginas | Total 16 Páginas | |
| PDF Descargar | [ Datasheet LTC2622.PDF ] | |
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