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ISL12021 Schematic ( PDF Datasheet ) - Intersil Corporation

Teilenummer ISL12021
Beschreibung Real Time Clock
Hersteller Intersil Corporation
Logo Intersil Corporation Logo 




Gesamt 24 Seiten
ISL12021 Datasheet, Funktion
ISL12021
®
Real Time Clock with On Chip Temp Compensation ±5ppm
Data Sheet
March 30, 2007
FN6451.0
Low Power RTC with VDD Battery Backed
SRAM and Embedded Temp
Compensation ±5ppm with Auto Day Light
Saving
The ISL12021 device is a low power real time clock with an
embedded Temp sensor for oscillator compensation,
clock/calendar, power fail, low battery monitor, brown out
indicator, single periodic or polled alarms, intelligent battery
backup switching and 128 bytes of battery-backed user
SRAM.
The oscillator uses an external, low-cost 32.768kHz crystal.
The real time clock tracks time with separate registers for
hours, minutes, and seconds. The device has calendar
registers for date, month, year and day of the week. The
calendar is accurate through 2099, with automatic leap year
correction.
Daylight Savings time adjustment is done automatically,
using parameters entered by the user. Power fail and battery
monitors offer user-selectable trip levels. A time stamp
function records the time and date of switchover from VDD to
battery power, and also from battery to VDD power.
Pinoutwww.DataSheet4U.com
ISL12021
(14 LD TSSOP)
TOP VIEW
NC
X1
X2
VBAT
GND
LVRST
NC
1
2
3
4
5
6
7
14 NC
13 VDD
12 IRQ
11 SCL
10 SDA
9 FOUT
8 NC
Features
• Real Time Clock/Calendar
- Tracks Time in Hours, Minutes and Seconds
- Day of the Week, Day, Month and Year
• On-chip Oscillator Compensation Over the Operating
Temp Range
- ±5ppm over -20°C to +70°C
• Day Light Saving Time
- Customer Programmable
• Separate FOUT pin
- 15 Selectable Frequency Outputs
• 1 Alarm
- Settable to the Second, Minute, Hour, Day of the Week,
Day, or Month
- Single Event or Pulse Interrupt Mode
- Dedicated IRQ output pin
• Automatic Backup to Battery or Super Cap
- Operation to VBAT = 1.8V
- 1.0µA Battery Supply Current
• Battery Status Monitor, 2 Levels, Selectable by Customer
to:
- Seven Selectable Voltages for Each Level
• Power status Brown Out Monitor
- Six selectable trip level, from 4.675V to 2.295V
- Separate Low Voltage LVRST pin
• Time Stamp during Power to Battery and Battery to Power
Cross Over
- Time Stamp. First VDD to VBAT, and Last VBAT to VDD
• 128 Bytes Battery-Backed User SRAM
• I2C Interface
- 400kHz Clock Frequency
• 14 Ld TSSOP package
• Pb-Free Plus Anneal Available (RoHS Compliant)
Applications
• Utility Meters
• POS Equipment
• Medical Application
• Security Related Application
• Vending Machine
• White Goods
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2007. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.






ISL12021 Datasheet, Funktion
ISL12021
EQUIVALENT AC OUTPUT LOAD CIRCUIT FOR VDD = 5V
5.0V
SDA,
IRQ and FOUT
1533Ω
FOR VOL= 0.4V
AND IOL = 3mA
100pF
FIGURE 1. STANDARD OUTPUT LOAD FOR TESTING THE
DEVICE WITH VDD = 5.0V
General Description
The ISL12021 device is a low power real time clock (RTC)
with embedded temperature sensors. It contains crystal
frequency compensation circuitry over the operating
temperature range, clock/calendar, power fail and low
battery monitors, brown out indicator with separate
(LVRSET) reset pin, 1 periodic or polled alarm, intelligent
battery backup switching and 128 Bytes of battery-backed
user SRAM.
The oscillator uses an external, low cost 32.768kHz crystal.
The real time clock tracks time with separate registers for
hours, minutes and seconds. The device has calendar
registers for date, month, year and day of the week. The
calendar is accurate through 2099, with automatic leap year
correction. In addition, the ISL12021 could be programmed
for automatic Daylight Saving Time (DST) adjustment by
entering local DST information.
The ISL12021’s alarm can be set to any clock/calendar
value for a match. For example, every minute, every
Tuesday or at 5:23 AM on March 21. The alarm status is
available by checking the Status Register, or the device can
be configured to provide a hardware interrupt via the IRQ
pin. There is a repeat mode for the alarm allowing a periodic
interrupt every minute, every hour, every day, etc.
The device also offers a backup power input pin. This VBAT
pin allows the device to be backed up by battery or Super
Cap with automatic switchover from VDD to VBAT. The
ISL12021 device is specified for VDD = 2.7V to 5.5V and the
clock/calendar portion of the device remains fully operational
in battery backup mode down to 1.8V (Standby Mode). The
VBAT level is monitored and reported against preselected
levels. The first report is registered when the VBAT level falls
below 85% of nominal level, the second level is set for 75%.
Battery levels are stored in VBATM registers.
The ISL12021 offers a “Brown Out” alarm once the VDD falls
below a pre-selected trip level. This allows system CPU to
save vital information to memory before complete power
loss. There are six VDD levels that could be selected for
initiation of brown out alarm.
Pin Descriptions
X1, X2
The X1 and X2 pins are the input and output, respectively, of
an inverting amplifier. An external 32.768kHz quartz crystal
is used with the device to supply a timebase for the real time
clock. Internal compensation circuitry with internal
temperature sensor provides frequency corrections for
selected popular crystals to ±5ppm over the operating
temperature range from -40°C to +85°C. (See “Application
Section” on page 21 for recommended crystal). The
ISL12021 allows the user to input via I2C serial bus the
temperature variation profiles of crystals not listed in the
“Application Section” on page 21. This oscillator
compensation network can also be used to calibrate the
initial crystal timing accuracy at room temperature. The
device can also be driven directly from a 32.768kHz source
at pin X1.
X1
X2
FIGURE 2. RECOMMENDED CRYSTAL CONNECTION
VBAT
This input provides a backup supply voltage to the device.
VBAT supplies power to the device in the event that the VDD
supply fails. This pin can be connected to a battery, a Super
Capacitor or tied to ground if not used. See the Battery
Monitor parameter in the DC Operating Characteristics-RTC
on page 3.
IRQ (Interrupt Output)
This pin provides an interrupt signal output. This signal
notifies a host processor that an alarm has occurred and
requests action. It is an open drain active low output. Once
triggered, the output will stay low until the Alarm status
register bit is reset or, if the autoreset function is used, a
read is performed to the status register.
FOUT (Frequency Output)
This pin outputs a clock signal which is related to the crystal
frequency. The frequency output is user selectable and
enabled via the I2C bus. It is an open drain output.
Serial Clock (SCL)
The SCL input is used to clock all serial data into and out of
the device. The input buffer on this pin is always active (not
gated). It is disabled when the backup power supply on the
VBAT pin is activated to minimize power consumption.
6 FN6451.0
March 30, 2007

6 Page









ISL12021 pdf, datenblatt
ISL12021
Real Time Clock Registers
Addresses [00h to 06h]
RTC REGISTERS (SC, MN, HR, DT, MO, YR, DW)
These registers depict BCD representations of the time. As
such, SC (Seconds) and MN (Minutes) range from 0 to 59,
HR (Hour) can either be a 12-hour or 24-hour mode, DT
(Date) is 1 to 31, MO (Month) is 1 to 12, YR (Year) is 0 to 99,
and DW (Day of the Week) is 0 to 6.
The DW register provides a Day of the Week status and uses
three bits DW2 to DW0 to represent the seven days of the
week. The counter advances in the cycle 0-1-2-3-4-5-6-0-1-
2-… The assignment of a numerical value to a specific day
of the week is arbitrary and may be decided by the system
software designer. The default value is defined as “0”.
24 HOUR TIME
If the MIL bit of the HR register is “1”, the RTC uses a
24-hour format. If the MIL bit is “0”, the RTC uses a 12-hour
format and HR21 bit functions as an AM/PM indicator with a
“1” representing PM. The clock defaults to 12-hour format
time with HR21 = “0”.
LEAP YEARS
Leap years add the day February 29 and are defined as those
years that are divisible by 4. Years divisible by 100 are not leap
years, unless they are also divisible by 400. This means that
the year 2000 is a leap year and the year 2100 is not. The
ISL12021 does not correct for the leap year in the year 2100.
Control and Status Registers (CSR)
Addresses [07h to 0Fh]
The Control and Status Registers consist of the Status
Register, Interrupt and Alarm Register, Analog Trimming and
Digital Trimming Registers.
Status Register (SR)
The Status Register is located in the memory map at
address 07h. This is a volatile register that provides either
control or status of RTC failure (RTCF), Battery Level
Monitor (LBAT85, LBAT75), alarm trigger, Daylight Saving
Time, crystal oscillator enable and temperature conversion
in progress bit.
TABLE 2. STATUS REGISTER (SR)
ADDR 7
6
5 43
2
10
07h BUSY OSCF DSTDJ ALM LVDD LBAT85 LBAT75 RTCF
BUSY BIT (BUSY)
Busy Bit indicates temperature sensing is in progress. In this
mode, Alpha, Beta and ITRO registers are disabled and
cannot be accessed.
OSCILLATOR FAIL BIT (OSCF)
Indicates oscillator stopped.
12
DAYLIGHT SAVING TIME CHANGE BIT (DSTADJ)
DSTADJ is the Daylight Saving Time Adjusted Bit. It
indicates the daylight saving time adjustment has happened.
DSTADJ is reset to 0 upon power up. If DST event happens
(at either the beginning or the end of DST), DSTADJ will be
set to 1. A read of the SR will reset the DSTADJ, or it will be
automatically reset on the following month.
ALARM BIT (ALM)
These bits announce if the alarm matches the real time clock.
If there is a match, the respective bit is set to “1”. This bit can
be manually reset to “0” by the user or automatically reset by
enabling the auto-reset bit (see ARST bit). A write to this bit in
the SR can only set it to “0”, not “1”. An alarm bit that is set by
an alarm occurring during an SR read operation will remain
set after the read operation is complete.
LOW VDD INDICATOR BIT (LVDDVDD)
Indicates VDD dropped below the pre-selected trip level.
(Brown Out Mode). The Trip points for Brown Out levels are
selected by three bits VDDTrip2, VDDTrip1 and VDDTrip0 in
PWR_VDD registers.
LOW BATTERY INDICATOR 85% BIT (LBAT85)
Indicates battery level dropped below the pre-selected trip
levels (85% of battery voltage). The trip points are selected
by three bits: VB85Tp2, VB85Tp1 and VB85Tp0 in the
PWR_VBAT registers.
LOW BATTERY INDICATOR 75% BIT (LBAT75)
Indicates battery level dropped below the pre-selected trip
levels (75% of battery voltage). The trip points are selected
by three bits VB75Tp2, VB75Tp1 and VB75Tp0 in the
PWR_VBAT registers.
REAL TIME CLOCK FAIL BIT (RTCF)
This bit is set to a “1” after a total power failure. This is a read
only bit that is set by hardware (ISL12021 internally) when
the device powers up after having lost all power (defined as
VDD = 0V and VBAT = 0V). The bit is set regardless of
whether VDD or VBAT is applied first. The loss of only one of
the supplies does not set the RTCF bit to “1”. The first valid
write to the RTC section after a complete power failure
resets the RTCF bit to “0” (writing one byte is sufficient).
Interrupt Control Register (INT)
TABLE 3. INTERRUPT CONTROL REGISTER (INT)
ADDR 7 6 5
4 3210
08h ARST WRTC IM FOBATB FO3 FO2 FO1 FO0
AUTOMATIC RESET BIT (ARST)
This bit enables/disables the automatic reset of the ALM,
LVDD, LBAT85, and LBAT75 status bits only. When ARST
bit is set to “1”, these status bits are reset to “0” after a valid
read of the respective status register (with a valid STOP
FN6451.0
March 30, 2007

12 Page





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