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PDF ISL84782 Data sheet ( Hoja de datos )
| Número de pieza | ISL84782 | |
| Descripción | Differential 4 to 1 Analog Multiplexer | |
| Fabricantes | Intersil Corporation | |
| Logotipo |  |
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®
Data Sheet
November 17, 2004
ISL84782
FN6097.3
Ultra Low ON-Resistance, Low-Voltage,
Single Supply, Differential 4 to 1 Analog
Multiplexer
The Intersil ISL84782 device contains precision, bidirectional,
analog switches configured as a differential 4-channel
multiplexer/demultiplexer. It is designed to operate from a
single +1.6V to +3.6V supply. The device has an inhibit pin to
simultaneously open all signal paths.
ON resistance is 0.5Ω with a +3V supply and 0.62Ω with a
single +1.8V supply. Each switch can handle rail to rail
analog signals. The off-leakage current is only 4nA max at
+25°C and 30nA max at +85°C with a +3.3V supply.
All digital inputs are 1.8V logic-compatible when using a
single +3V supply.
The ISL84782 is a differential 4 to 1 multiplexer device that is
offered in a 16 Ld TSSOP package and a 16 Ld thin QFN
package.
Table 1 summarizes the performance of this family.
TABLE 1. FEATURES AT A GLANCE
www.DataSheet4U.com
Configuration
ISL84782
Diff 4:1 Mux
3V RON
3V tON/tOFF
1.8V RON
1.8V tON/tOFF
Packages
0.5Ω
16ns/13ns
0.62Ω
24ns/16ns
16 Ld TSSOP, 16 Ld 3x3 Thin QFN
Related Literature
• Technical Brief TB363 “Guidelines for Handling and
Processing Moisture Sensitive Surface Mount Devices
(SMDs)”
• Application Note AN557 “Recommended Test Procedures
for Analog Switches”
Features
• Pin Compatible Replacement for the MAX4782 and
MAX4618
• ON Resistance (RON)
- V+ = +3.0V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5Ω
- V+ = +1.8V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.62Ω
• RON Matching Between Channels. . . . . . . . . . . . . . . . 0.12Ω
• RON Flatness Across Signal Range . . . . . . . . . . . . . .0.056Ω
• Single Supply Operation. . . . . . . . . . . . . . . . . +1.6V to +3.6V
• Low Power Consumption (PD). . . . . . . . . . . . . . . . . . <0.2µW
• Fast Switching Action (VS = +3V)
- tON . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16ns
- tOFF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13ns
• Guaranteed Break-Before-Make
• High Current Handling Capacity (300mA Continuous)
• Available in 16 Ld 3x3 Thin QFN and 16 Ld TSSOP
• 1.8V CMOS-Logic Compatible (+3V Supply)
• Pb-Free Available (RoHS Compliant) (see Ordering Info)
• ISL84782IR Replaces the ISL43L740IR.
Applications
• Battery Powered, Handheld, and Portable Equipment
- Cellular/Mobile Phones
- Pagers
- Laptops, Notebooks, Palmtops
• Portable Test and Measurement
• Medical Equipment
• Audio and Video Switching
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2004. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
1 page  
ISL84782
Electrical Specifications: 1.8V Supply Test Conditions: V+ = +1.8V, GND = 0V, VINH = 1V, VINL = 0.4V (Notes 4, 8),
Unless Otherwise Specified (Continued)
PARAMETER
TEST CONDITIONS
TEMP MIN
(°C) (NOTE 5)
TYP
MAX
(NOTE 5) UNITS
Inhibit Turn-OFF Time, tOFF
V+ = 1.8V, VAx or VBx = 1.0V, RL = 50Ω, CL = 35pF,
(See Figure 1, Note 10)
25
Full
-
-
16 25 ns
- 27 ns
Address Transition Time, tTRANS
V+ = 1.8V, VAX or VBX = 1.0V, RL = 50Ω, CL = 35pF,
(See Figure 1, Note 10)
25
Full
-
-
25 34 ns
- 36 ns
Break-Before-Make Time, tBBM
V+ = 1.8V, VAX or VBX = 1.0V, RL = 50Ω, CL = 35pF,
25
-
9
- ns
(See Figure 3, Note 10)
Charge Injection, Q
CL = 1.0nF, VG = 0V, RG = 0Ω, (See Figure 2)
25 - -39 - pC
Test Circuits and Waveforms
LOGIC
INPUT
V+
0V
50%
tON
tr < 5ns
tf < 5ns
VA0, VB0
SWITCH
OUTPUT 0V
tOFF
90% VOUT
90%
Logic input waveform is inverted for switches that have the opposite
logic sense.
FIGURE 1A. INHIBIT tON/tOFF MEASUREMENT POINTS
V+
CC
V+
LOGIC
INPUT
A0, B0
A1,A2,B1,
B2,A3,B3
INH
GND
COMA
COMB
ADD0-1
VOUT
RL CL
50Ω 35pF
Repeat test for other switches. CL includes fixture and stray
capacitance.
VOUT = V(NO or NC) -R----L-----+--R--R---L--(--O-----N----)
FIGURE 1B. INHIBIT tON/tOFF TEST CIRCUIT
LOGIC
INPUT
V+
0V
VA0, VB0
50%
tTRANS
VOUT
tr < 5ns
tf < 5ns
90%
V+
CC
V+ A0, B0
A1,A2,B1,
B2,A3,B3
COMA,
COMB
VOUT
SWITCH
OUTPUT
VA3, VB3
10%
0V
LOGIC
INPUT
ADD0-1 GND INH
RL
50Ω
CL
35pF
tTRANS
Logic input waveform is inverted for switches that have the opposite
logic sense.
Repeat test for other switches. CL includes fixture and stray
capacitance.
VOUT = V(NO or NC) -R----L-----+--R--R---L--(--O-----N----)
FIGURE 1C. ADDRESS tTRANS MEASUREMENT POINTS
FIGURE 1D. ADDRESS tTRANS TEST CIRCUIT
FIGURE 1. SWITCHING TIMES
5 FN6097.3
November 17, 2004
5 Page 
ISL84782
Thin Shrink Small Outline Plastic Packages (TSSOP)
N
INDEX
AREA
E1
-B-
E
0.25(0.010) M B M
GAUGE
PLANE
123
0.05(0.002) SEATING PLANE
-A-
D
A
0.25
0.010
L
-C-
e A1
b
0.10(0.004) M C A M B S
α
A2
0.10(0.004)
c
NOTES:
1. These package dimensions are within allowable dimensions of
JEDEC MO-153-AB, Issue E.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate
burrs. Mold flash, protrusion and gate burrs shall not exceed
0.15mm (0.006 inch) per side.
4. Dimension “E1” does not include interlead flash or protrusions.
Interlead flash and protrusions shall not exceed 0.15mm (0.006
inch) per side.
5. The chamfer on the body is optional. If it is not present, a visual
index feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. Dimension “b” does not include dambar protrusion. Allowable
dambar protrusion shall be 0.08mm (0.003 inch) total in excess
of “b” dimension at maximum material condition. Minimum space
between protrusion and adjacent lead is 0.07mm (0.0027 inch).
10. Controlling dimension: MILLIMETER. Converted inch dimen-
sions are not necessarily exact. (Angles in degrees)
M16.173
16 LEAD THIN SHRINK SMALL OUTLINE PLASTIC PACKAGE
INCHES
MILLIMETERS
SYMBOL MIN MAX MIN MAX NOTES
A
-
0.043
-
1.10
-
A1 0.002 0.006 0.05 0.15
-
A2
0.033 0.037 0.85
0.95
-
b
0.0075 0.012 0.19
0.30
9
c
0.0035 0.008 0.09
0.20
-
D
0.193 0.201 4.90
5.10
3
E1
0.169 0.177 4.30
4.50
4
e 0.026 BSC
0.65 BSC
-
E
0.246 0.256 6.25
6.50
-
L
0.020 0.028 0.50
0.70
6
N 16
16 7
α 0o 8o 0o 8o -
Rev. 1 2/02
11 FN6097.3
November 17, 2004
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet ISL84782.PDF ] | |
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