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PDF ISL22416 Data sheet ( Hoja de datos )
| Número de pieza | ISL22416 | |
| Descripción | Single Digitally Controlled Potentiometer | |
| Fabricantes | Intersil Corporation | |
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ISL22416
® Single Digitally Controlled Potentiometer (XDCP™)
Data Sheet
June 23, 2006
FN6227.0
Low Noise, Low Power, SPI® Bus, 128 Taps
The ISL22416 integrates a single digitally controlled
potentiometer (DCP) and non-volatile memory on a
monolithic CMOS integrated circuit.
The digitally controlled potentiometer is implemented with a
combination of resistor elements and CMOS switches. The
position of the wiper is controlled by the user through the SPI
serial interface. The potentiometer has an associated
volatile Wiper Register (WR) and a non-volatile Initial Value
Register (IVR) that can be directly written to and read by the
user. The contents of the WR controls the position of the
wiper. At power-up the device recalls the contents of the
DCP’s IVR to the WR.
The DCP can be used as three-terminal potentiometer or as
two-terminal variable resistor in a wide variety of applications
including control, parameter adjustments, and signal
processing.
Pinout
www.DataSheet4U.com
SCK
SDO
SDI
CS
SHDN
ISL22416
(10 LD MSOP)
TOP VIEW
1 10 VCC
2 9 RH
3 8 RW
4 7 RL
5 6 GND
Features
• 128 resistor taps
• SPI serial interface
• Non-volatile storage of wiper position
• Wiper resistance: 70Ω typical @ 3.3V
• Shutdown mode
• Shutdown current 5µA max
• Power supply: 2.7V to 5.5V
• 50kΩ or 10kΩ total resistance
• High reliability
- Endurance: 1,000,000 data changes per bit per register
- Register data retention: 50 years @ T ≤ 55 °C
• 10 Lead MSOP
• Pb-free plus anneal product (RoHS compliant)
Ordering Information
PART NUMBER
PART MARKING
RESISTANCE OPTION
(kΩ)
TEMP. RANGE
(°C)
PACKAGE
PKG. DWG. #
ISL22416UFU10Z
(Notes 1, 2)
416UZ
50
-40 to +125
10 Ld MSOP
M10.118
(Pb-Free)
ISL22416WFU10Z
(Notes 1, 2)
416WZ
10
-40 to +125
10 Ld MSOP
M10.118
(Pb-Free)
NOTES:
1. Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate
termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are
MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
2. Add “-TK” suffix for 1,000 Tape and Reel option
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) and XDCP are registered trademarks of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2006. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
1 page  
ISL22416
Operating Specifications Over the recommended operating conditions unless otherwise specified. (Continued)
SYMBOL
PARAMETER
TEST CONDITIONS
TYP
MIN (NOTE 5)
Hysteresis
VOL
Rpu
(Note 18)
Cpin
(Note 19)
SHDN, SCK, SDI, and CS Input Buffer
Hysteresis
SDO Output Buffer LOW Voltage
SDO Pull-up Resistor Off-chip
SHDN, SCK, SDI, SDO and CS Pin
Capacitance
IOL = 4mA
Maximum is determined by tRO and tFO with
maximum bus load Cb = 30pF, fSCK = 5MHz
0.05*
VCC
0
fSCK
tCYC
tWH
tWL
tLEAD
tLAG
tSU
tH
tRI
tFI
tDIS
tV
tHO
tRO
tFO
tCS
SPI Frequency
SPI Clock Cycle Time
SPI Clock High Time
SPI Clock Low Time
Lead Time
Lag Time
SDI, SCK and CS Input Setup Time
SDI, SCK and CS Input Hold Time
SDI, SCK and CS Input Rise Time
SDI, SCK and CS Input Fall Time
SDO Output Disable Time
SDO Output Valid Time
SDO Output Hold Time
SDO Output Rise Time
SDO Output Fall Time
CS Deselect Time
Rpu = 2k, Cbus = 30pF
Rpu = 2k, Cbus = 30pF
200
100
100
250
250
50
50
10
10
0
0
2
MAX
0.4
2
10
5
20
100
350
60
60
UNIT
V
V
kΩ
pF
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
Notes:
5. Typical values are for TA = 25°C and 3.3V supply voltage.
6. LSB: [V(RW)127 – V(RW)0]/127. V(RW)127 and V(RW)0 are V(RW) for the DCP register set to 7F hex and 00 hex respectively. LSB is the
incremental voltage when changing from one tap to an adjacent tap.
7. ZS error = V(RW)0/LSB.
8. FS error = [V(RW)127 – VCC]/LSB.
9. DNL = [V(RW)i – V(RW)i-1]/LSB-1, for i = 1 to 127. i is the DCP register setting.
10. INL = [V(RW)i – (i • LSB) – V(RW)0]/LSB for i = 1 to 127
11.
TCV
=
-------M-----a----x----(--V----(---R-----W------)--i--)---–-----M-----i--n----(--V-----(--R-----W------)--i--)------ × ----1---0----6----- for i = 16 to 127 decimal, T = -40°C to 125°C. Max( ) is the maximum value of the wiper
[Max(V(RW)i) + Min(V(RW)i)] ⁄ 2 165°C voltage and Min ( ) is the minimum value of the wiper voltage over the temperature range.
12. MI = |RW127 – RW0|/127. MI is a minimum increment. RW127 and RW0 are the measured resistances for the DCP register set to 7F hex and
00 hex respectively.
13. Roffset = RW0/MI, when measuring between RW and RL.
Roffset = RW127/MI, when measuring between RW and RH.
14. RDNL = (RWi – RWi-1)/MI -1, for i = 1 to 127.
15. RINL = [RWi – (MI • i) – RW0]/MI, for i = 1 to 127.
16.
TCR
=
----[---M-----a----x----(--R-----i--)---–-----M-----i--n----(--R-----i--)--]---- × ----1----0---6-----
[Max(Ri) + Min(Ri)] ⁄ 2 165°C
for i = 16 to 127, T = -40°C to 125°C. Max( ) is the maximum value of the resistance and Min ( ) is
the minimum value of the resistance over the temperature range.
17. tWC is the time from the end of a Write sequence of SPI serial interface, to the end of the self-timed internal non-volatile write cycle.
18. Rpu is specified for the highest data rate transfer for the device. Higher value pull-up can be used at lower data rates.
19. This parameter is not 100% tested.
5 FN6227.0
June 23, 2006
5 Page 
ISL22416
CS
SCK
SDI
0 1 0 1 0 0 0 0 0 I3 I2 I1 I0 0 0 R1 R0
0 D6 D5 D4 D3 D2 D1 D0
FIGURE 16. THREE BYTE WRITE SEQUENCE
the IVR or the WR register (depends of VOL bit at ACR). If
the R1 bit is 1 and R0 bit is 0, then the operation is on the
ACR.
Write Operation
A Write operation to the ISL22416 is a three-byte operation.
It requires first, the CS transition from HIGH to LOW, then a
valid Identification Byte, then a valid instruction byte followed
by Data Byte is sent to SDI pin. The host terminates the write
operation by pulling the CS pin from LOW to HIGH. For a
write to address 0 (WR), the byte at address 2 (ACR<7>)
determines if the Data Byte is to be written to volatile or both
volatile and non-volatile registers. Refer to “Memory
Description” and Figure 16.
The internal non-volatile write cycle starts after rising edge of
CS and takes up to 20ms.
Read Operation
A read operation to the ISL22416 is a three byte operation. It
requires first, the CS transition from HIGH to LOW, then a
valid Identification Byte, then a valid instruction byte followed
by “dummy” Data Byte is sent to SDI pin. The SPI host reads
the data from SDO pin on falling edge of SCK. The host
terminates the read operation by pulling the CS pin from
LOW to HIGH (see Figure 17).
In order to read back the non-volatile IVR, it is reccomended
that the application reads the ACR first to verify the WIP bit
is 0. If the WIP bit (ACR[5]) is not 0, the host should repeat
its reading sequence again.
Applications Information
Communicating with ISL22416
Communication with ISL22416 proceeds using SPI interface
through the ACR (address 10b), IVR (address 00b) and WR
(address 00b) registers.
The wiper of the potentiometer is controlled by the WR
register. Writes and reads can be made directly to this
register to control and monitor the wiper position without any
non-volatile memory changes. This is done by setting MSB
bit at address 10b to 1.
The non-volatile IVR stores the power up value of the wiper.
IVR is accessible when MSB bit at address 10b is set to 0.
Writing a new value to the IVR register will set a new power
up position for the wiper. Also, writing to this register will load
the same value into the WR as the IVR. Reading from the
IVR will not change the WR, if its contents are different.
CS
SCK
SDI
SDO
0 1 0 1 0 0 0 0 0 I3 I2 I1 I0 0 0 R1 R0
Don’t Care
0 D6 D5 D4 D3 D2 D1 D0
FIGURE 17. THREE BYTE READ SEQUENCE
11 FN6227.0
June 23, 2006
11 Page | ||
| Páginas | Total 13 Páginas | |
| PDF Descargar | [ Datasheet ISL22416.PDF ] | |
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