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PDF HI1171 Data sheet ( Hoja de datos )

Número de pieza HI1171
Descripción High Speed D/A Converter
Fabricantes Intersil Corporation 
Logotipo Intersil Corporation Logotipo



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HI1171
August 1997
8-Bit, 40 MSPS, High Speed D/A Converter
Features
Description
• Throughput Rate . . . . . . . . . . . . . . . . . . . . . . . . . 40MHz
• Resolution . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-Bit
• Integral Linearity Error . . . . . . . . . . . . . . . . . . 0.25 LSB
• Low Glitch Noise
• Single Supply Operation . . . . . . . . . . . . . . . . . . . . . . +5V
• Low Power Consumption (Max) . . . . . . . . . . . . . .80mW
• Evaluation Board Available (HI1171-EV)
• Direct Replacement for the Sony CXD1171
Applications
• Wireless Telecommunications
The HI1171 is an 8-bit, 40MHz, high speed D/A converter.
The converter incorporates an 8-bit input data register with
blanking capability, and current outputs. The HI1171 fea-
tures low glitch outputs. The architecture is a current cell
arrangement to provide low linearity errors.
The HI1171 is available in an Industrial temperature range
and is offered in a 24 lead (200 mil) SOIC plastic package.
For dual version, please refer to the HI1177 Data Sheet.
For triple version, please refer to the HI1178 Data Sheet.
Ordering Information
PART
NUMBER
TEMP. RANGE
(oC)
PACKAGE
PKG. NO.
• Signal Reconstruction
HI1171JCB
-40 to 85 24 Ld SOIC M24.2-S
• Direct Digital Synthesis
• Imaging
HI1171-EV
25 Evaluation Board
• Presentation and Broadcast Video
• Graphics Displays
www.DataSheet4U.com
• Signal Generators
Pinout
HI1171
(SOIC)
TOP VIEW
(LSB) D0 1
D1 2
D2 3
D3 4
D4 5
D5 6
D6 7
D7 8
BLNK 9
DVSS 10
VB 11
CLK 12
24 DVDD
23 DVDD
22 AVDD
21 IOUT2
20 IOUT1
19 AVDD
18 AVDD
17 VG
16 VREF
15 IREF
14 AVSS
13 DVSS
Typical Application Circuit
+5V
HI1171
+5V
0.1µF
DVDD (23, 24)
(18, 19, 22) AVDD
0.1µF
D7
D7 (MSB)(8)
(17) VG
0.1µF
D6 D6 (7)
D5 D5 (6)
(16) VREF
1k
D4 D4 (5)
D3 D3 (4)
D2 D2 (3)
D1 D1 (2)
(20) IOUT1
D0 D0 (LSB) (1)
D/A
OUT
200
0.1µF
CLK (12)
VB (11)
BLNK (9)
DVSS (10, 13)
(15) IREF
(21) IOUT2
(14) AVSS
3.3k
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999
1
File Number 3662.2

1 page




HI1171 pdf
Typical Performance Curves
2
HI1171
200
100
1
VDD = 5.0V, R = 200
16R = 3.3k, TA = 25oC
1
REFERENCE VOLTAGE (V)
2
FIGURE 2. OUTPUT FULL SCALE VOLTAGE vs REFERENCE
VOLTAGE
100
OUTPUT RESISTANCE ()
200
FIGURE 3. OUTPUT RESISTANCE vs GLITCH ENERGY
2.0
1.9
VDD = 5.0V, VREF = 2.0V
R = 200Ω, 16R = 3.3k
TA = 25oC
0
-25 0
25 50 75
AMBIENT TEMPERATURE (oC)
FIGURE 4. OUTPUT FULL SCALE VOLTAGE vs AMBIENT TEMPERATURE
Pin Descriptions
24 PIN
SOIC
1-8
PIN
NAME
PIN DESCRIPTION
D0(LSB) thru Digital Data Bit 0, the Least Significant Bit thru Digital Data Bit 7, the Most Significant Bit.
D7(MSB)
9
BLNK
Blanking Line, used to clear the internal data register to the zero condition when High, normal operation
when Low.
10, 13
11
12
DVSS
VB
CLK
Digital Ground.
Voltage Bias, connect a 0.1µF capacitor to DVSS.
Data Clock Pin 100kHz to 40MHz.
14
AVSS
Analog Ground.
15
IREF
Current Reference, used to set the current range. Connect a resistor to AVSS that is 16 times greater
than the resistor on IOUT1. (See Typical Applications Circuit).
16
VREF
Input Reference Voltage used to set the output full scale range.
5

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