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COM20051I Schematic ( PDF Datasheet ) - SMSC Corporation

Teilenummer COM20051I
Beschreibung Integrated Microcontroller and ARCNET (ANSI 878.1) Interface
Hersteller SMSC Corporation
Logo SMSC Corporation Logo 




Gesamt 30 Seiten
COM20051I Datasheet, Funktion
COM20051I
Integrated Microcontroller and
ARCNET (ANSI 878.1) Interface
!" High Performance/Low Cost
!" Microcontroller Based on Popular 8051
Architecture
!" Intel 8051 Instruction Set Compatible
!" Drop-In Replacement for 80C32 PLCC
!" Network Supports up to 255 Nodes
!" Powerful Network Diagnostics
!" Maximum 507 Byte Packets
!" Duplicate Node ID Detection
!" Self-Configuring Network Protocol
FEATURES
!" Retains all 8051 Peripherals Including Serial I/O
and Two Timers
!" Utilizes ARCNET Token Bus Network Engine
!" Requires No Special Emulators
!" 5 Mbps to 156 Kbps Network Data Rate
!" Network Interface Supports RS-485, Twisted Pair,
Coaxial, and Fiber Optic Interfaces
!" Receive All Mode Allows Any Packet to Be
Received
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GENERAL DESCRIPTION
The COM20051I is a low-cost, highly-integrated microcontroller incorporating a high-performance network controller
based on the ARCNET Token Bus Standard (ANSI 878.1). The COM20051I is based around the popular Intel 8051
architecture. The device is implemented using a microcontroller core compatible with the Intel 80C32 ROMless
version of the 8051 architecture. The COM20051I is ideal for distributed control networking applications such as
those found in industrial/machine controls, building/factory automation, consumer products, instrumentation and
automobiles.
The COM20051I contains many features that are beneficial for embedded control applications. The microcontroller is
a fully-functional 16MHz 80C32 that is comparable to the Intel 80C32 with 2 timers. In contrast to other embedded
controller/networking solutions, the COM20051I adds a fully-featured, robust, powerful, and simple network interface
while retaining all of the basic 8051 peripherals, such as the serial port and counter/timers.
In addition, the COM20051I supports an Emulation Mode that permits the use of a standard 80C32 emulator in
conjunction with the COM20051I to develop software drivers for the network core. ARCNET core is mapped to a
256-byte page of the External Data Memory Space of the 80C32. This provides for an easy interface between the
CPU and the ARCNET core. The networking core is based around an ARCNET Token Bus protocol engine
that provides highly-reliable and fault tolerant message delivery at data rates ranging from 5Mbps down to 156
Kbps with message sizes varying from 0 to 507 bytes. The ARCNET protocol offers a simple, standardized, and
easily-understood networking solution for any application. The network interface supports several media interfaces,
including RS-485, coaxial, and twisted pair in either bus or star topologies. The network interface incorporates
powerful diagnostic features for network management and fault isolation. These include duplicate node ID detection,
reconfiguration detection, receive all (monitor) mode, receiver activity, and token detection.
ORDERING INFORMATION
Order Number: COM20051ILJ P
44 Pin PLCC Package
SMSC DS – COM20051I
Rev. 03/27/2000






COM20051I Datasheet, Funktion
PIN NO.
NAME
35 nEnable
36-43
44
P0.7-0.0
Power Supply
DESCRIPTION OF PIN FUNCTIONS
SYMBOL
DESCRIPTION
nEA Input. When high, causes the 8051's outputs to tri-
state. When low, allows the 8051 to address external
memory. Must be low to execute code from the
embedded 8051.
P0.7-0.0
Input/Output. Port 0 of the 8051. Multiplexed low
order address/data bus.
VCC
+5V power supply.
RESET CIRCUIT FOR THE COM20051I
The power on reset circuit for the COM20051I should be designed to provide a clean, fast transition time TTL input to
the COM20051I. Sufficient signal high time on RST (pin 10) should be provided after Vcc reaches +5V DC. The
following circuit, which provides an 8ms power-on reset pulse, is recommended:
Vcc (+5V)
22uF/
10V
220
74LS14
RST (PIN 10)
SMSC DS – COM20051I
Page 6
Rev. 03/27/2000

6 Page









COM20051I pdf, datenblatt
Reconfigure
Timer has
Timed Out
Power On
Send
Reconfigure
Burst
Read Node ID
Write ID to
RAM Buffer
Set NID=ID
1
Start
Reconfiguration
Timer (840 mS)
Y
Invitation
N
to Transmit to
this ID?
NY
TA?
Broadcast?
Y
Send
Packet
N
Transmit
NAK
Transmit
ACK
Was Packet
Broadcast?
Y
Y
Y RI?
Free Buffer
Enquiry to
this ID?
N
N
YN
SOH?
YN
RI?
Transmit
Free Buffer
Enquiry
N
YN
ACK?
No
Activity
for 74.7
us?
YN
NAK?
Write SID
to Buffer
Y
Set TA
DID Y
=0?
N
DID
=ID?
YN
Broadcast
Enabled?
Y
N
N
No
Activity
Y
for 74.7
us?
N
Set TA
NY
ACK?
Set TMA
Increment
NID
1
Y
No
Activity
for 74.7
us?
Write Buffer
with Packet
Pass the
Token
CRC N
N OK?
Y
LENGTH
OK?
Y
N
- ID refers to the identification number of the ID assigned to this node.
- NID refers to the next identification number that receives the token after
after this ID passes it.
- SID refers to the source identification.
- DID refers to the destination identification.
- SOH refers to the start of header character; preceeds all data packets.
Note*: Time values pertain to the default 2.5 Mbps operation
DID
=0?
N
Y
DID
=ID?
Y
N
SEND ACK
Set RI
No Activity
for 82
uS?
Y
Set NID=ID
N
Start Timer:
T=(255-ID)
x 146 us
Activity
On Line?
N
N
T=0?
Y
Y
FIGURE 3 - DETAILED ARCNET CORE OPERATION
SMSC DS – COM20051I
Page 12
Rev. 03/27/2000

12 Page





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