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PDF SY10 Data sheet ( Hoja de datos )

Número de pieza SY10
Descripción SYNCHRONOUS EQUIPMENT STRATUM 3/3E CLOCK UNIT
Fabricantes Raltron Electronics 
Logotipo Raltron Electronics Logotipo



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No Preview Available ! SY10 Hoja de datos, Descripción, Manual

SY10
FEATURES
SYNCHRONOUS EQUIPMENT
STRATUM 3/3E CLOCK UNIT – SY10
Date: August 30, 2002
INTRODUCTION
The SY10 - an accurate time and frequency source
that had been designed as a subsystem level
module. The module is designed to work within ATM,
SONET, SDH, and wireless systems where
synchronization is vital. The SY10 is an excellent
synchronization solution for timing, with jitter and
wander compliance per the specified within ITU-T
Recommendations G.812/G.813 and Bellcore GR-
1244-CORE. The SY10 is an enhanced version of
SY01 and is designed for Stratum 3 and Stratum 3E,
but also holds certain features that can make it
useful for SONET Minimum Clock (SMC) or other
kinds of system clocks.
v A synchronization solution for timing, jitter and wander concerns in a single module.
v Complies with ITU-T Recommendations G.812/813 and Bellcore GR-1244-CORE for Stratum 3 and Stratum
3E applications.
v Supports modes of operation: Locked, Holdover and Free-run.
v Accepts reference inputs from up to six independent sources from 8KHz to 77.76MHz
v Provides up to 3 output from 8KHz to 77.76MHz (Two user select and one fixed at 8KHz)
v Loop filtering utilizing specific software application in the digital signal processor (DSP).
v Continuously monitors and evaluate input reference signals.
v Phase build-out for output clock.
v Creates a history buffer for Holdover mode operation.
v Alarm and status signals and messages.
v Host interface SPI for configuring and remote monitoring.
v Supports Master/Slave configuration of two SY10 with minimum phase error between two clocks.
v Provides “hit-less” switching during switching between the clocks.
v Pin compatible with 18 pins SY01 module.
v Small dimensions of 1.82 x 1.82 x 0.7 inch. (0.60 inch with no mechanical cover)
APPLICATION
The SY10, a Synchronous Equipment Clock (SEC), fulfills clock regeneration function for STRATUM 3 and 3E
equipment for: ATM, SDH, PDH, and SONET networks. It was designed for network system manufacturers such
as: Access Switches, Core Switches, Cross Connects, Digital Multiplexers-Exchangers, and SDH/SONET
equipment. The unit is also suitable for PCS, WLL, and Wireless Base Stations. Wherever a Timing unit with high
performance specifications is required, the SY10 can be embedded within the network system and provide all
necessary frequencies and interfaces.
RALTRON ELECTRONICS CORP. § 10651 N.W.19th St § Florida 33172 § U.S.A.
Tel: 305 593-6033 § Fax: 305-594-3973 § e-mail: [email protected] § Internet: http://www.raltron.com
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SY10 pdf
SYNCHRONOUS EQUIPMENT
STRATUM 3/3E CLOCK UNIT – SY10
Control
Several controls pins are available for the user to control the operation of the SY10 Primary PLL. The three
external inputs CNT1, CNT2 and CNT3 provide the feature to change the state of operation. Below, the truth table
shows behavior of the SY10 module according to the control inputs states.
CNT3
0
0
0
0
1
1
1
1
CNT2
0
0
1
1
0
0
1
1
CNT1
0
1
0
1
0
1
0
1
MODE OF OPERATION
Free-run
Locked to REF1
Locked to REF2
Holdover
Locked to REF3
Locked to REF4
Locked to REF5
Locked to REF6
To change the operation of Secondary PLL (Master-Slave) can be change using MS/FR control pin.
MS/FR†
MODE OF OPERATION
1 (or open) Master (default)
0 Slave
†see explanation about MS/FR below.
The state of operation can be set and changed also using serial communication port, please see below.
The SY10 State Machine – Primary PLL
The state machine of SY10 module can be controlled using one of two interfaces:
1) three external control pins CNT1, CNT2 and CNT3.
2) setting bits (CON0, CON1, CON2 and CON3) in CFG1 register using serial peripheral interface (SPI).
After the reset the module is set to use three external control pins for control function but user can change it by
setting bit UI in register CFG1. By setting the UI bit to 1 the module ignores states of the control pins and use bits
in CFG1 register for state engine control. On the figure below is shown simplified stated diagram of SY10 module.
1
FREE RUN
2
4
3
5 REFERENCE
SWITCHING
7
6
14
8
9
11
FREQ. and PHASE
LOCKING
10
HOLDOVER
12
13
Figure 2 – The SY10 state diagram – Primary PLL.
RALTRON ELECTRONICS CORP. § 10651 N.W.19th St § Florida 33172 § U.S.A.
Tel: 305 593-6033 § Fax: 305-594-3973 § e-mail: [email protected] § Internet: http://www.raltron.com
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SY10 arduino
SYNCHRONOUS EQUIPMENT
STRATUM 3/3E CLOCK UNIT – SY10
7(MSB)
D7
654321
D6 D5 D4 D3 D2 D1
0(LSB)
D0
- D7-D0 – Content to be read from the module addressed by A5:A0
SPI Flowchart
Entry point
No of received
bytes > 0?
YES
NO
NO
Received
Address Valid?
YES
SPIStatus =
ADDRESSERROR
YES No of received
bytes = 1?
NO
WRITE
Command
Read or
Write?
READ
Fetch data from
MMR to send out
NO No of received
bytes = 2?
YES
READ Command Read
or Write?
WRITE
SPIStatus = OK
SPIStatus =
OVERFLOW
Wait for the
next byte
Reset all
NO
SPIStatus =
WRITEERROR
Valid Data to
write in MMR?
YES
Write Data in
MMR
SPIStatus = OK
Figure 10. - The SPI flowchart.
Timing diagrams
RALTRON ELECTRONICS CORP. § 10651 N.W.19th St § Florida 33172 § U.S.A.
Tel: 305 593-6033 § Fax: 305-594-3973 § e-mail: [email protected] § Internet: http://www.raltron.com
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