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PDF AM29SL160C Data sheet ( Hoja de datos )
| Número de pieza | AM29SL160C | |
| Descripción | CMOS 1.8 Volt-only Super Low Voltage Flash Memory | |
| Fabricantes | AMD | |
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Am29SL160C
Data Sheet
The following document contains information on Spansion memory products. Although the document
is marked with the name of the company that originally developed the specification, Spansion will
continue to offer these products to existing customers.
Continuity of Specifications
There is no change to this data sheet as a result of offering the device as a Spansion product. Any
changes that have been made are the result of normal data sheet improvement and are noted in the
document revision summary, where supported. Future routine revisions will occur when appropriate,
and changes will be noted in a revision summary.
Continuity of Ordering Part Numbers
Spansion continues to support existing part numbers beginning with “Am” and “MBM”. To order these
products, please use only the Ordering Part Numbers listed in this document.
For More Information
Please contact your local sales office for additional information about Spansion memory solutions.
Publication Number 21635 Revision C Amendment 5 Issue Date January 23, 2007
1 page  
DATA SHEET
TABLE OF CONTENTS
Product Selector Guide . . . . . . . . . . . . . . . . . . . . . 4
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Connection Diagrams . . . . . . . . . . . . . . . . . . . . . . . 5
Special Handling Instructions for FBGA Packages .................. 6
Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Ordering Information . . . . . . . . . . . . . . . . . . . . . . . 8
Device Bus Operations . . . . . . . . . . . . . . . . . . . . . . 9
Table 1. Am29SL160C Device Bus Operations ...............................9
Word/Byte Configuration .......................................................... 9
Requirements for Reading Array Data ..................................... 9
Writing Commands/Command Sequences ............................ 10
Accelerated Program Operation ............................................. 10
Program and Erase Operation Status .................................... 10
Standby Mode ........................................................................ 10
Automatic Sleep Mode ........................................................... 10
RESET#: Hardware Reset Pin ............................................... 10
Output Disable Mode .............................................................. 11
Table 2. Am29SL160CT Top Boot Sector Architecture ..................12
Table 3. Am29SL160CB Bottom Boot Sector Architecture .............13
Autoselect Mode ..................................................................... 14
Table 4. Am29SL160C Autoselect Codes (High Voltage Method) ..14
Sector/Sector Block Protection and Unprotection .................. 15
Table 5. Top Boot Sector/Sector Block Addresses
for Protection/Unprotection .............................................................15
Table 6. Bottom Boot Sector/Sector Block
Addresses for Protection/Unprotection ...........................................15
Write Protect (WP#) ................................................................ 16
Temporary Sector Unprotect .................................................. 16
Figure 1. In-System Sector Protect/Unprotect Algorithms .............. 17
Figure 2. Temporary Sector Unprotect Operation........................... 18
Secured Silicon (SecSi) Sector Flash Memory Region .......... 18
Table 7. SecSi Sector Addresses ...................................................18
Hardware Data Protection ...................................................... 18
Common Flash Memory Interface (CFI) . . . . . . . 19
Table 8. CFI Query Identification String ..........................................19
Table 9. System Interface String .....................................................20
Table 10. Device Geometry Definition ............................................20
Table 11. Primary Vendor-Specific Extended Query ......................21
Command Definitions . . . . . . . . . . . . . . . . . . . . . 21
Reading Array Data ................................................................ 21
Reset Command ..................................................................... 21
Autoselect Command Sequence ............................................ 22
Enter SecSi Sector/Exit SecSi Sector Command Sequence .. 22
Word/Byte Program Command Sequence ............................. 22
Figure 3. Program Operation .......................................................... 23
Chip Erase Command Sequence ........................................... 24
Sector Erase Command Sequence ........................................ 24
Erase Suspend/Erase Resume Commands ........................... 24
Figure 4. Erase Operation............................................................... 25
Command Definitions ............................................................. 26
Table 12. Am29SL160C Command Definitions ..............................26
Write Operation Status . . . . . . . . . . . . . . . . . . . . 27
DQ7: Data# Polling ................................................................. 27
Figure 5. Data# Polling Algorithm .................................................. 27
RY/BY#: Ready/Busy# ............................................................ 28
DQ6: Toggle Bit I .................................................................... 28
DQ2: Toggle Bit II ................................................................... 28
Reading Toggle Bits DQ6/DQ2 ............................................... 28
DQ5: Exceeded Timing Limits ................................................ 29
DQ3: Sector Erase Timer ....................................................... 29
Figure 6. Toggle Bit Algorithm........................................................ 29
Table 13. Write Operation Status ................................................... 30
Absolute Maximum Ratings . . . . . . . . . . . . . . . . 31
Figure 7. Maximum Negative Overshoot Waveform ...................... 31
Figure 8. Maximum Positive Overshoot Waveform........................ 31
Operating Ranges . . . . . . . . . . . . . . . . . . . . . . . . 31
DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 32
Figure 9. ICC1 Current vs. Time (Showing Active and Automatic
Sleep Currents) .............................................................................. 33
Figure 10. Typical ICC1 vs. Frequency ............................................ 33
Test Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Figure 11. Test Setup..................................................................... 34
Table 14. Test Specifications ......................................................... 34
Figure 12. Input Waveforms and Measurement Levels ................. 34
AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 35
Read Operations .................................................................... 35
Figure 13. Read Operations Timings ............................................. 35
Hardware Reset (RESET#) .................................................... 36
Figure 14. RESET# Timings .......................................................... 36
Word/Byte Configuration (BYTE#) ........................................ 37
Figure 15. BYTE# Timings for Read Operations............................ 37
Figure 16. BYTE# Timings for Write Operations............................ 37
Erase/Program Operations ..................................................... 38
Figure 17. Program Operation Timings.......................................... 39
Figure 18. Chip/Sector Erase Operation Timings .......................... 40
Figure 19. Data# Polling Timings (During Embedded Algorithms). 41
Figure 20. Toggle Bit Timings (During Embedded Algorithms)...... 41
Figure 21. DQ2 vs. DQ6................................................................. 42
Figure 22. Temporary Sector Unprotect Timing Diagram .............. 42
Figure 23. Accelerated Program Timing Diagram.......................... 43
Figure 24. Sector Protect/Unprotect Timing Diagram .................... 43
Figure 25. Alternate CE# Controlled Write Operation Timings ...... 45
Erase And Programming Performance . . . . . . . 46
Latchup Characteristics . . . . . . . . . . . . . . . . . . . . 46
TSOP Pin Capacitance . . . . . . . . . . . . . . . . . . . . . 46
Data Retention. . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
Physical Dimensions* . . . . . . . . . . . . . . . . . . . . . 47
TS 048—48-Pin Standard TSOP ............................................ 47
FBC048—48-Ball Fine-Pitch Ball Grid Array (FBGA)
8 x 9 mm package .................................................................. 48
Revision Summary . . . . . . . . . . . . . . . . . . . . . . . . 49
January 23, 2007 21635C5
Am29SL160C
3
5 Page 
DATA SHEET
DEVICE BUS OPERATIONS
This section describes the requirements and use of the
device bus operations, which are initiated through the
internal command register. The command register
itself does not occupy any addressable memory loca-
tion. The register is composed of latches that store the
commands, along with the address and data informa-
tion needed to execute the command. The contents of
the register serve as inputs to the internal state
machine. The state machine outputs dictate the func-
tion of the device. Table 1 lists the device bus
operations, the inputs and control levels they require,
and the resulting output. The following subsections
describe each of these operations in further detail.
Table 1. Am29SL160C Device Bus Operations
Operation
Read
Write
(Program/Erase)
Standby
Output Disable
Reset
Sector Protect
(Note 2)
Sector Unprotect
(Note 2)
Temporary Sector
Unprotect
CE# OE# WE# RESET# WP#/ACC
L LH
H
X
L HL
H (Note 3)
Addresses
(Note 1)
AIN
AIN
DQ0–
DQ7
DOUT
DIN
DQ8–DQ15
BYTE#
BYTE#
= VIH
= VIL
DOUT DQ8–DQ14 = High-Z,
DIN DQ15 = A-1
VCC ±
0.2 V
X
X
VCC ±
0.2 V
X
X High-Z High-Z
L HH
H
X
X High-Z High-Z
X XX
L
X
X High-Z High-Z
L HL
VID
Sector Address,
X A6 = L, A1 = H, DIN
A0 = L
X
L HL
Sector Address,
VID (Note 3) A6 = H, A1 = H, DIN
A0 = L
X
High-Z
High-Z
High-Z
X
X
X XX
VID (Note 3)
AIN
DIN DIN
High-Z
Legend:
L = Logic Low = VIL, H = Logic High = VIH, VID = 10 ± 1.0 V, VHH = 10 ± 0.5 V, X = Don’t Care, AIN = Address In, DIN = Data In,
DOUT = Data Out
Notes:
1. Addresses are A19:A0 in word mode (BYTE# = VIH), A19:A-1 in byte mode (BYTE# = VIL).
2. The sector protect and sector unprotect functions may also be implemented via programming equipment. See “Sector/Sector
Block Protection and Unprotection” on page 15.
3. If WP#/ACC = VIL, the two outermost boot sectors are protected. If WP#/ACC = VIH, the two outermost boot sectors are
protected or unprotected as previously set by the system. If WP#/ACC = VHH, all sectors, including the two outermost boot
sectors, are unprotected.
Word/Byte Configuration
The BYTE# pin controls whether the device data I/O
pins DQ15–DQ0 operate in the byte or word configura-
tion. If the BYTE# pin is set at logic ‘1’, the device is in
word configuration, DQ15–DQ0 are active and con-
trolled by CE# and OE#.
If the BYTE# pin is set at logic ‘0’, the device is in byte
configuration, and only data I/O pins DQ0–DQ7 are
active and controlled by CE# and OE#. The data I/O
pins DQ8–DQ14 are tri-stated, and the DQ15 pin is
used as an input for the LSB (A-1) address function.
Requirements for Reading Array Data
To read array data from the outputs, the system must
drive the CE# and OE# pins to VIL. CE# is the power
control and selects the device. OE# is the output
control and gates array data to the output pins. WE#
should remain at VIH. The BYTE# pin determines
whether the device outputs array data in words or
bytes.
The internal state machine is set for reading array data
upon device power-up, or after a hardware reset. This
ensures that no spurious alteration of the memory
content occurs during the power transition. No
command is necessary in this mode to obtain array
January 23, 2007 21635C5
Am29SL160C
9
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