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PDF LPC47S45X Data sheet ( Hoja de datos )
| Número de pieza | LPC47S45X | |
| Descripción | Advanced I/O | |
| Fabricantes | SMSC Corporation | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de LPC47S45X (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
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LPC47S45x
Advanced I/O with X-Bus Interface
FEATURES
3.3 Volt Operation (5V tolerant)
Floppy Disk Controller (Supports 2 FDCs)
Multi-Mode Parallel Port
Two UARTs
8042 Keyboard Controller
SMBus Controller
- SMBus access to LCD Interface
- SMBus Serial Port 2 Interface Disable
- SMBus access to Power On Elapsed Time
Counters
- Programmable Slave Address
X-Bus Interface
- Supports up to four external I/O components
- Offers two modes of operation
- Support for Driving LCD Panel Interface
Controller
- Supports Port 80h “Snooping”
Programmable Wakeup Event Interface (IO_PME#
Pin)
SMI Support (IO_SMI# Pin)
GPIOs (55)
Fan Controller
- One Fan Speed Control Output
- One Fan Tachometer Input
ISA IRQ to Serial IRQ Conversion
XNOR Chain for Board Test Mode
PC2001 and ACPI 2.0 Compliant
128-pin QFP Package
ISA Plug-and-Play Compatible Register Set
Intelligent Auto Power Management
Power On Elapsed Time Counters
- Counter for Main Power
- Counter for Standby Power
Real Time Clock
- MC146818 and DS1287 Compatible
- 256 Bytes of Battery Backed CMOS in Two 128-
Byte Banks
- 128 Bytes of CMOS RAM Lockable in 4x32 Byte
Blocks
- 12 and 24 Hour Time Format
- 24-hour daily alarm
- 30-day alarm
- Binary and BCD Format
- <1μA Standby Current (typ)
2.88MB Super I/O Floppy Disk Controller
- Licensed CMOS 765B Floppy Disk Controller
- Software and Register Compatible with SMSC's
Proprietary 82077AA Compatible Core
- Configurable Open Drain/Push-Pull Output
Drivers
- Supports Vertical Recording Format
- 16-Byte Data FIFO
- 100% IBM Compatibility
- Detects All Overrun and Underrun Conditions
- Sophisticated Power Control Circuitry (PCC)
Including Multiple Powerdown Modes for
Reduced Power Consumption
- DMA Enable Logic
- Data Rate and Drive Control Registers
- 480 Address, up to 15 IRQ and Four DMA
Options
Enhanced Digital Data Separator
- 2 Mbps, 1 Mbps, 500 Kbps, 300 Kbps, 250 Kbps
Data Rates
- Programmable Precompensation Modes
Keyboard Controller
- 8042 Software Compatible
- 8-Bit Microcomputer
- 2k Bytes of Program ROM
- 256 Bytes of Data RAM
- Four Open Drain Outputs Dedicated for
Keyboard/Mouse Interface
- Asynchronous Access to Two Data Registers and
One Status Register
- Supports Interrupt and Polling Access
- 8-Bit Counter Timer
- Port 92 Support
- Fast Gate A20 and KRESET Outputs
Serial Ports
- Two Full Function Serial Ports
- High Speed NS16C550A Compatible UARTs with
Send/Receive 16-Byte FIFOs
- Supports 230k and 460k Baud
- Programmable Baud Rate Generator
- Modem Control Circuitry
- 480 Address and 15 IRQ Options
- IrDA 1.0, HP-SIR, ASK IR Support
SMSC LPC47S45x
DATASHEET
Rev. 06-01-06
1 page  
7 ACPI/PME/SMI FEATURES .............................................................................................................. 147
7.1 POWER STATES..............................................................................................................................................147
7.1.1 Global/System Sleep States .................................................................................................................147
7.1.2 Device Sleep States .............................................................................................................................147
7.1.3 Wake Events ........................................................................................................................................147
7.2 ACPI SPECIFIC REGISTERS .............................................................................................................................148
7.3 ACPI FEATURES ............................................................................................................................................150
7.3.1 Legacy/ACPI Select..............................................................................................................................150
7.3.2 Power Button with Override ..................................................................................................................150
7.3.3 RTC Alarm as a PME Event .................................................................................................................151
7.4 PME SUPPORT ..............................................................................................................................................151
7.4.1 ‘Wake On Specific Key’ Option .............................................................................................................152
7.5 SYSTEM MANAGEMENT INTERRUPT (SMI) .........................................................................................................154
7.5.1 SMI Registers .......................................................................................................................................154
7.5.2 ACPI Support Register for SMI Generation ..........................................................................................155
8 RUNTIME REGISTERS ..................................................................................................................... 156
8.1 RUNTIME REGISTERS BLOCK SUMMARY............................................................................................................156
8.2 RUNTIME REGISTERS BLOCK DESCRIPTION .......................................................................................................160
9 CONFIGURATION ............................................................................................................................. 185
9.1 SYSTEM ELEMENTS ........................................................................................................................................185
9.2 CONFIGURATION SEQUENCE ............................................................................................................................185
9.3 PROGRAMMING EXAMPLE ................................................................................................................................185
9.4 CHIP LEVEL (GLOBAL) CONTROL/CONFIGURATION REGISTERS[0X00-0X2F].........................................................185
9.5 LOGICAL DEVICE CONFIGURATION/CONTROL REGISTERS [0X30-0XFF] ...............................................................185
10 OPERATIONAL DESCRIPTION..................................................................................................... 185
10.1
10.2
MAXIMUM GUARANTEED RATINGS.................................................................................................................185
DC ELECTRICAL CHARACTERISTICS ..............................................................................................................185
11 TIMING DIAGRAMS ....................................................................................................................... 185
11.1 POWER-UP TIMING .....................................................................................................................................185
11.2 INPUT CLOCK TIMING...................................................................................................................................185
11.3 OUTPUT CLOCK TIMING ...............................................................................................................................185
11.4 LPC INTERFACE .........................................................................................................................................185
11.5 FLOPPY DISK TIMING...................................................................................................................................185
11.6 PARALLEL PORT TIMING...............................................................................................................................185
11.6.1 ECP Parallel Port Timing ..................................................................................................................185
11.7 INFRARED INTERFACE TIMING DIAGRAMS.......................................................................................................185
11.8 SMBUS TIMING .........................................................................................................................................185
11.9 X-BUS TIMING ............................................................................................................................................185
11.9.1 Timing For LPC initiated I/O Cycles with the X-Bus ..........................................................................185
11.9.2 Representative LPC I/O Cycle to X-Bus Cycle Timing ......................................................................185
11.9.3 X-Bus Write Cycle: LPC I/O Write Cycle - Data from Host to X-Bus Device .....................................185
11.9.4 Timing For SMBus initiated I/O Cycles with the X-Bus......................................................................185
11.10 TIMING FOR SERIAL IRQ’S ...........................................................................................................................185
11.11 KEYBOARD/MOUSE TIMING ..........................................................................................................................185
11.12 FAN TIMING ................................................................................................................................................185
11.13 TIMING FOR LED OUTPUT............................................................................................................................185
12 SMSC 128 PIN QFP PACKAGE OUTLINE, 3.9 MM FOOTPRINT................................................ 185
13 APPENDIX - TEST MODES ........................................................................................................... 185
13.1 NORMAL OPERATING POWER SUPPLY STATE.................................................................................................185
13.2 TEST MODES ..............................................................................................................................................185
13.2.1 Board Test Mode...............................................................................................................................185
13.2.2 XNOR-Chain Test Mode ...................................................................................................................185
SMSC LPC47S45x
Page 5 of 259
DATASHEET
Rev. 06-01-06
5 Page 
3 PINOUT
PIN #
1
2
3
4
5
NAME
VTR
Vbat
XTAL1
XTAL2/CLKI32
AVSS
PIN #
33
34
35
36
37
NAME
SER_IRQ
VSS
GP80
GP81
GP82
PIN #
65
66
67
68
69
NAME
GP35/IRQINB
GP36/nKBDRST
GP37/A20M
VCC
nINIT
6 GP40/DRVDEN0
7 GP41/DRVDEN1
38 GP83
39 GP84
70 nSLCTIN
71 PD0
8 MTR0#
40 GP85
72 PD1
9 DSKCHG#
41 GP86
73 PD2
10 DS0#
42 GP87
74 PD3
11 DIR#
43 GP62/IRQINC
75 PD4
12 STEP#
44 GP20/P17/DS1#
76 PD5
13 WDATA#
45 GP21/P16
77 PD6
14 WGATE#
46 GP22/P12/MTR1# 78 PD7
15 HDSEL#
47 GP23/IRQIND
79 VSS
16 INDEX#
48 GP24/P17
80 SLCT
17 TRK0#
49 GP25/P12
81 PE
18 WRTPRT#
50 GP26/SYSOPT
82 BUSY
19 RDATA#
51 GP60/LED1
83 nACK
20 GP42/IO_PME#
52 GP61/LED2
84 nERROR
21 VCC
53 GP27/IO_SMI#
85 nALF
22 CLOCKI
54 GP30/nXCS2
86 nSTROBE
23 LAD0
55 GP31/nXCS3
87 RXD1
24 LAD1
56 VTR
88 TXD1
25 LAD2
57 GP32/FAN_TACH 89 nDSR1
26 LAD3
58 GP33/FAN
90 nRTS1
27 LFRAME#
59 KDAT
91 nCTS1
28 LDRQ#
60 KCLK
92 nDTR1
29 PCI_RESET#
61 MDAT
93 nRI1
30 LPCPD#
62 MCLK
94 nDCD1
31 GP43/DDRC
63 VSS
95 GP50/nRI2
32 PCI_CLK
64 GP34/IRQINA
96 VCC
Note: Pin 4, XTAL2/CLKI32, must not be grounded if XOSEL is floating.
PIN #
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
NAME
GP51/nDCD2
GP52/RXD2/IRRX
GP53/TXD2/IRTX
GP54/nDSR2
GP55/nRTS2
/SADR0
GP56/nCTS2
GP57/nDTR2
/SADR1
SCLK
SDAT
VSS
nXWR/GP70
nXRD/GP71
XA0/GP72
XA1/GP73
XA2/GP74
XA3/GP75
nXCS0/GP76
XCS1/GP77
LCDCS
XD0/GP10
XD1/GP11
XD2/GP12
XD3/GP13
XD4/GP14
XD5/GP15
XD6/GP16
XD7/GP17
XOSEL
VTR
CLKO40
nPB_IN
nPS_ON
SMSC DS – LPC47S45x
Page 11 of 259
DATASHEET
Rev. 07/09/2001
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet LPC47S45X.PDF ] | |
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