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PDF FDC37B72X Data sheet ( Hoja de datos )
| Número de pieza | FDC37B72X | |
| Descripción | 128 Pin Enhanced Super I/O Controller | |
| Fabricantes | SMSC Corporation | |
| Logotipo |  |
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FDC37B72x
128 Pin Enhanced Super I/O Controller with
ACPI Support
FEATURES
• 5 Volt Operation
• PC98/99 and ACPI 1.0 Compliant
• Battery Back-up for Wake-Events
• ISA Host Interface
• ISA Plug-and-Play Compatible Register
Set
- 12 IRQ Options
- 15 Serial IRQ Options
- 16 Bit Address Qualification
- Four DMA Options
- 12mA AT Bus Drivers
• BIOS Buffer
• 20 GPI/O Pins
• 32 kHz Standby Clock Output
• Soft Power Management
• ACPI/PME Support
• SCI/SMI Support
- Watchdog timer
- Power Button Override Event
- Either Edge Triggered Interrupts
• Intelligent Auto Power Management
- Shadowed Write-only Registers
- Programmable Wake-up Event
Interface
• 8042 Keyboard Controller
- 2K Program ROM
- 256 Bytes Data RAM
- Asynchronous Access to Two Data
Registers and One Status Register
- Supports Interrupt and Polling
Access
- 8 Bit Timer/Counter
- Port 92 Support
- Fast Gate A20 and Hardware Keyboard
Reset
• 2.88MB Super I/O Floppy Disk Controller
- Relocatable to 480 Different Addresses
- Licensed CMOS 765B Floppy Disk
Controller
- Advanced Digital Data Separator
- SMSC's Proprietary 82077AA
Compatible Core
- Sophisticated Power Control Circuitry
(PCC) Including Multiple Powerdown
Modes for Reduced Power Consumption
- Supports Two Floppy Drives Directly
- Software Write Protect
- FDC on Parallel Port
- Low Power CMOS Design
- Supports Vertical Recording Format
- 16 Byte Data FIFO
- 100% IBM® Compatibility
- Detects All Overrun and Underrun
Conditions
- 24mA Drivers and Schmitt Trigger Inputs
• Enhanced FDC Digital Data Separator
- Low Cost Implementation
- No Filter Components Required
- 2 Mbps, 1 Mbps, 500 Kbps, 300 Kbps,
250 Kbps Data Rates
- Programmable Precompensation Modes
• Serial Ports
- Relocatable to 480 Different Addresses
1 page  
GENERAL DESCRIPTION
The FDC37B72x incorporates a keyboard
interface, SMSC's true CMOS 765B floppy disk
controller, advanced digital data separator, 16 byte
data FIFO, two 16C550 compatible UARTs, one
Multi-Mode parallel port which includes ChiProtect
circuitry plus EPP and ECP support, on-chip 12
mA AT bus drivers, and two floppy direct drive
support, soft power management and SMI support
and Intelligent Power Management including
PME and SCI/ACPI support. The true CMOS
765B core provides 100% compatibility with IBM
PC/XT and PC/AT architectures in addition to
providing data overflow and underflow protection.
The SMSC advanced digital data separator
incorporates SMSC's patented data separator
technology, allowing for ease of testing and use.
Both on-chip UARTs are compatible with the
NS16C550A. The parallel port is compatible with
IBM PC/AT architecture, as well as EPP and ECP.
The FDC37B72x incorporates sophisticated power
control circuitry (PCC) which includes support for
keyboard, mouse, modem ring, power button
support and other wake-up events. The PCC
supports multiple low power down modes.
The FDC37B72x provides features for compliance
with the “Advanced Configuration and Power
Interface Specification” (ACPI).
These features include support of both legacy and
ACPI power management models through the
selection of SMI or SCI. It implements a power
button override event (4 second button hold to turn
off the system) and either edge triggered
interrupts.
The FDC37B72x provides support for the ISA
Plug-and-Play Standard (Version 1.0a) and
provides for the recommended functionality to
support Windows '95/’98 and PC98/PC99.
Through internal configuration registers, each of
the FDC37B72x's logical device's I/O address,
DMA channel and IRQ channel may be
programmed. There are 480 I/O address location
options, 12 IRQ pin options or Serial IRQ option,
and four DMA channel options for each logical
device.
The FDC37B72x Floppy Disk Controller and data
separator do not require any external filter
components and are therefore easy to use, offer
lower system cost and reduced board area. The
FDC is software and register compatible with
SMSC's proprietary 82077AA core.
5
5 Page 
GENERAL PURPOSE I/O PINS
PIN NO.
QFP
77
78
79
80
81
82
4
6
39
2
91
92
83
84
85
86
87
88
89
90
Note 1:
Note 2:
Note 3:
TABLE 3 - GENERAL PURPOSE I/O PIN FUNCTIONS
DEFAULT ALTERNATE ALTERNATE ALTERNATE
INDEX
FUNCTION FUNCTION 1 FUNCTION 2 FUNCTION 3
BUFFER
TYPE5
REG. GPIO
GPIO
nSMI
-
-
IOP4/(OP12/
GP1 GP10
GPIO
GPIO
nRING
WDT
EETI1
P17/P124
-
EETI1
OD12)
IOP4/I/I
IOP4/O4/IO4/I
GP1
GP1
GP11
GP12
GPIO
LED
-
-
IOP4/O24
GP1 GP13
GPIO
IRRX2
-
-
IOP4/I
GP1 GP14
GPIO
IRTX2
-
-
IOP4/O24
GP1 GP15
nMTR1
GPIO
-
-
(O24/OD24)/
GP1 GP16
IOP4
nDS1
GPIO
-
-
(O24/OD24)/
GP1 GP17
IOP4
PCI_CLK
IRQ14
GPIO
-
CLKIN/(O12/
GP5 GP50
OD12)/IOP4
DRVDEN1 GPIO
IRQ8
nSMI
(O24/OD24)
GP5 GP52
/IOP4/
(OP12/OD12)/
nROMCS2
IRQ11
GPIO
EETI1
(OP12/OD12)
IO12/(O12/
GP5 GP53
nROMOE2
IRQ12
GPIO
EETI1
OD12)/IOP4/I
IO12/(O12/
GP5 GP54
RD02,3
IRQ1
GPIO
nSMI
OD12)/IOP4/I
IO12/(O12/
GP6 GP60
OD12)/IOP4/
RD12,3
IRQ3
GPIO
LED
(OP12/OD12)
IO12/(O12/
GP6 GP61
OD12)/IOP4/
RD22,3
IRQ4
GPIO
nRING
O24
IO12/(O12/
GP6 GP62
RD32,3
IRQ5
GPIO
WDT
OD12)/IOP4/I
IO12/(O12/
GP6 GP63
OD12)/IOP4/
RD42,3
IRQ6
GPIO
P17/P124
O4
IO12/(O12/
GP6 GP64
OD12)/IOP4/
RD52,3
IRQ7
GPIO
-
IO4
IO12/(O12/
GP6 GP65
RD62,3
IRQ8
GPIO
-
OD12)/IOP4
IO12/(OP12/
GP6 GP66
RD72,3
IRQ10
GPIO
-
OD12)/IOP4
IO12/(O12/
GP6 GP67
OD12)/IOP4
Either Edge Triggered Interrupt Inputs.
At power-up, RD0-7, nROMCS and nROMOE function as the XD Bus. To use RD0-7 for alternate
functions, nROMCS must stay high until those pins are finished being programmed.
These pins cannot be programmed as open drain pins in their original function.
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet FDC37B72X.PDF ] | |
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