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PDF SY89202U Data sheet ( Hoja de datos )
| Número de pieza | SY89202U | |
| Descripción | Precision 1:8 LVPECL Fanout Buffer | |
| Fabricantes | Micrel Semiconductor | |
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SY89202U
Precision 1:8 LVPECL Fanout Buffer with
Three ÷1/÷2/÷4 Clock Divider Output Banks
General Description
The SY89202U is a precision, high-speed,
integrated clock divider LVPECL fanout buffer
Precision Edge®
capable of handling clocks up to 1.5GHz. Optimized
for communications applications, the three
independently controlled output banks are phase
matched and can be configured for pass-through
Features
• Three low-skew LVPECL output banks with
programmable ÷1, ÷2 and ÷4 divider options
(÷1), ÷2 or ÷4 divide ratios.
• Three independently programmable output banks
The differential input includes Micrel’s unique, 3-pin
input termination architecture that allows the user to
interface to any AC- or DC-coupled signal as small
as 100mV (200mVpp) without any level shifting or
termination resistor networks in the signal path. The
• Guaranteed AC performance over temp and
voltage:
– >1.5GHz clock frequency (fMAX)
– <930ps In-to-Out tpd
– <220ps tr/tf
low skew, low jitter outputs are 800mV, 100k
• Ultra-low jitter design:
compatible LVPECL, with extremely fast rise/fall
times guaranteed to be less than 220ps.
– <1psRMS random jitter (RJ)
– <10psPP total jitter (clock)
The EN (enable) input guarantees that the ÷1, ÷2
• Internal input termination
and ÷4 outputs will start from the same state without
any runt pulse after an asynchronous MR (master
• Patent-pending input termination and VT pin
accepts DC-coupled and AC-coupled inputs (CML,
reset) is asserted. This is accomplished by enabling
PECL, LVDS)
the outputs after a four-clock delay to allow the • 800mVwww.DataSheet4U.com LVPECL output swing
counters to synchronize.
The SY89202U is part of Micrel’s Precision Edge®
• CMOS/TTL-compatible output enable (EN) and
divider select control
product family.
• Power supply 2.5V +5% or 3.3V +10%
All support documentation can be found at Micrel’s
web site at: www.micrel.com
• –40oC to +85oC industrial temperature range
• Available in 32-pin MLF® package
Applications
• All SONET/SDH channel select applications
• All Fibre Channel multi-channel select applications
• All Gigabit Ethernet multi-channel select
Applications
Markets
• LAN/WAN
• Enterprise servers
• ATE
• Test and measurement
Precision Edge is a registered trademark of Micrel, Inc.
MicroLeadFrame and MLF are registered trademarks of Amkor Technology.
June 2006
M9999-061206-B
[email protected] or (408) 955-1690
1 page  
Micrel, Inc.
Absolute Maximum Ratings(1)
Supply Voltage (VCC) .............................-0.5V to +4.0V
Input Voltage (VIN) .....................................-0.5V to VCC
Termination Current
Source or sink current on VT .................... ±100mA
Output Current
Source or sink current on IN, /IN................ ±50mA
VREF-AC Current
Source or sink current on VREF-AC.............. ±1.5mA
Lead Temperature (soldering, 20 sec.)............ +260°C
Storage Temperature (Ts) ...................–65°C to 150°C
SY89202U
Operating Ratings(2)
Supply Voltage (VCC) ....................+2.375V to +2.625V
........................................................ +3.0V to +3.6V
APmacbkiaegnet TTehmerpmeraal tRureesi(sTtaA)n.c..e..(.4.)........... –40°C to +85°C
MLF® (θJA)
Still-Air ........................................................ 35°C/W
MLF® (ψJB)
Junction-to-Board ...................................... 20°C/W
DC Electrical Characteristics(5)
TA = –40°C to +85°C, unless otherwise stated.
Symbol Parameter
Condition
Min Typ Max Units
VCC Power Supply
2.375
3.0
2.625
3.6
V
V
ICC
RDIFF_IN
Power Supply Current
Differential Input Resistance
(IN-to-/IN)
No load, max. VCC
125 180 mA
90 100 110 Ω
RIN Input Resistance
(IN-to-VT)
VIH Input High Voltage
(IN, /IN)
45 50 55 Ω
1.2 VCC V
VIL Input Low Voltage
(IN, /IN)
0
VIH–0.1
V
VIN Input Voltage Swing
(IN, /IN)
See Figure 1a.
100
VCC mV
VDIFF_IN
Differential Input Voltage Swing
|IN-/IN|
See Figure 1b.
200
mV
VREF-AC
Output Reference Voltage
(VREF-AC)
VCC–1.3 VCC–1.2 VCC–1.1
V
IN-to-VT Voltage from Input to VT
1.8 V
Notes:
1. Permanent device damage may occur if absolute maximum ratings are exceeded. This is a stress rating only and functional operation is
not implied at conditions other than those detailed in the operational sections of this data sheet. Exposure to absolute maximum ratings
conditions for extended periods may affect device reliability.
2. The data sheet limits are not guaranteed if the device is operated beyond the operating ratings.
3. Package Thermal Resistance assumes exposed pad is soldered (or equivalent) to the devices most negative potential on the PCB. θJA and
ψJB values are determined for a 4-layer board in still air, unless otherwise stated.
4. The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established.
June 2006
5 M9999-061206-B
[email protected] or (408) 955-1690
5 Page 
Micrel, Inc.
Input and Output Stages
SY89202U
Figure 2a. Simplified Differential Input Stage
Input Interface Applications
Figure 2b. Simplified LVPECL Output Stage
Figure 3a. LVPECL Interface
(DC-Coupled)
Figure 3b. LVPECL Interface
(AC-Coupled)
Option: may connect VT to VCC
Figure 3c. CML Interface
(DC-Coupled)
Figure 3d. CML Interface
(AC-Coupled)
June 2006
Figure 3e. LVDS Interface
(DC-Coupled)
Figure 3f. LVDS Interface
(AC-Coupled)
11 M9999-061206-B
[email protected] or (408) 955-1690
11 Page | ||
| Páginas | Total 13 Páginas | |
| PDF Descargar | [ Datasheet SY89202U.PDF ] | |
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