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LR38666Y Schematic ( PDF Datasheet ) - Sharp Electrionic

Teilenummer LR38666Y
Beschreibung CMOS digital signal processor
Hersteller Sharp Electrionic
Logo Sharp Electrionic Logo 




Gesamt 30 Seiten
LR38666Y Datasheet, Funktion
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LR38666Y
LR38666Y
DESCRIPTION
The LR38666Y is a CMOS digital signal processor
for color digital still camera systems of 1 310 k/ 2 140 k/
3 300 k/3 370 k/4 200 k-pixel CCDs with primary
color mosaic filters.
One-chip System LSI for Digital Still
Cameras
• Power supplies
– +2.5 V for digital/analog circuits
– +3.3 V for digital circuits
• Package : 240-ball CSP (T-TFBGA240-1414)
FEATURES
• ARM7TDMI is used as the CPU core
• CCD signal processor modules
– Supported image size : 1 310 k/ 2 140 k/3 300 k/
3 370 k/4 200 k pixels
– R, G and B primary color mosaic filters :
Bayer matrix, 10 bits per color
– Built-in auto focus, auto exposure and auto
white balance functions
– Built-in digital clamp and gamma correction
functions
• Video encoder module
– Composite analog signal output mode : www.DataSheet4U.com
Switchable between NTSC and PAL
– Built-in OSDC function
• JPEG encoding/decoding module :
Built-in circuits for encoding and decoding
– Encoding rate : Max. 66 ms per frame
(for 1/10-compression in VGA mode)
– Decoding rate : Max. 66 ms per frame
(for decompression in VGA mode)
(Assuming that SDRAM is used and the internal
bus is occupied by the JPEG module)
• SDRAM/flash memory controller module
• Synchronous/asynchronous SIO
• USB 1.0 is supported
• General purpose I/O ports
• Built-in audio I/F
• Built-in resizing function
• Built-in CompactFlash I/F
• Built-in SmartMedia I/F
In the absence of confirmation by device specification sheets, SHARP takes no responsibility for any defects that may occur in equipment using any SHARP devices shown in
catalogs, data books, etc. Contact SHARP in order to obtain the latest device specification sheets before using any SHARP device.
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LR38666Y Datasheet, Funktion
LR38666Y
PIN NO. COORDINATE SYMBOL
80 7P MEMA6
81 7R MEMA7
82 7L TEST6Z
83 8M MEMA8
84 7T MEMA9
85 8N DGND
86 8R DVDD
87 8P MEMA10
88 8T MEMA11
89 8L DGND
90 9M MEMA12
91 9N MEMA13
92 9R MEMA14
93 9P DGND
94 9L DVDD2
95 9T MEMA15
96 10L MEMA16
97 10N MEMA17
98 10R DVDD
99 10P MEMA18
100 10M DGND
101 10T MEMA19
102 11L MEMA20
103 11N FLCE0Z
104 11R FLCE1Z
105 11T FL_EXOEZ
106 11P DGND
107 11M FL_EXWEZ
108 12T FLWPZ
109 12N FLRP0Z
110 12R FLRP1Z
111 12P EXCS0Z
112 13T DVDD
113 13N EXCS1Z
114 13R EXDACK0Z
115 13P EXDACK1Z
116 14T EXINTZ
117 15T CFRDBY
118 14P CFCD1Z
119 14R CFCD2Z
120 – NC
IO SYMBOL
DESCRIPTION
O12 Address for SDRAM/flash memory/external device
O12 Address for SDRAM/flash memory/external device
IU Test (Must be open.)
O12 Address for SDRAM/flash memory/external device
O12 Address for SDRAM/flash memory/external device
– Ground
– Power supply (+3.3 V)
O12 Address for SDRAM/flash memory/external device
O12 Address for SDRAM/flash memory/external device
– Ground
O12 Address for SDRAM/flash memory/external device
O12 Address for SDRAM/flash memory/external device
O12 Address for SDRAM/flash memory/external device
– Ground
– Internal power supply (+2.5 V)
O12 Address for flash memory/external device/CompactFlash (CFA5)
O12 Address for flash memory/external device/CompactFlash (CFA6)
O12 Address for flash memory/external device/CompactFlash (CFA7)
– Power supply (+3.3 V)
O12 Address for flash memory/external device/CompactFlash (CFA8)
– Ground
O12 Address for flash memory/external device/CompactFlash (CFA9)
O12 Address for flash memory/external device/CompactFlash (CFA10)
O8 Chip enable for flash memory, Block 0
IO8 Chip enable for flash memory, Block 1/GIO18
O8 Output enable for flash memory/external device/CompactFlash
– Ground
O8 Write enable for flash memory/external device/CompactFlash
O8 Write protect for flash memory
O8 Reset/deep power down for flash memory, Block 0
IO8 Reset/deep power down for flash memory, Block 1/GIO19
O8 Chip select 0 for external device
– Power supply (+3.3 V)
IO8 Chip select 1 for external device/GIO20
IU Data acknowledge 0 for external device
IO8U Data acknowledge 1 for external device/GIO21
IU External device interrupt
IU CompactFlash/SmartMedia READY/BUSY
IO8U CompactFlash/SmartMedia card detect signal 1/GIO22
IO8U
CompactFlash card detect signal 2/SmartMedia write protect
detect/GIO23
– Must be open.
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LR38666Y pdf, datenblatt
LR38666Y
Clock
The clock supplied to C24MI is doubled in
frequency by an internal PLL and then is used as
the main system clock. This clock is also used by
the NTSC/PAL module in NTSC mode.
The clock supplied to C29MI is doubled in
frequency by an internal PLL and then is used by
the NTSC/PAL module in PAL mode only. The
PAL mode allows clock oscillation. If the PAL
mode is not used, fix the input level to High or Low.
Note that, in NTSC mode, the accuracy of burst
signals (deflection from the specified frequency) for
video output depends on the accuracy of the clock
supplied to C24MI. In PAL mode, the accuracy of
burst signals (deflection from the specified
frequency) for video output depends on the
accuracy of the clock supplied to C29MI.
The clock supplied to COMI is doubled in frequency
by an internal PLL and then is used by the UART,
USART, USB and AUDIOIF modules. Only 24 MHz
frequency can be used.
Note that the accuracy of the clock supplied to
COMI influences the pulse width of the I/O signals.
Supply the clock (synchronized with CCD data) to
TGCLK. Use as low a noise level signal as possible.
Note that accuracy of the clock supplied to TCLK
influences the accuracy of the clock of AUDIOIF.
If TCLK is not used, fix the input level to High or
Low.
Power Supply Pins
Connect low noise power lines to the PLL power
supply pin (PLVDD), the PLL ground pin (PLGND),
the DA converter power supply pin (DAVDD) and
the DA converter ground pin (DAGND).
Note that PLVDD and DAVDD are connected to
DVDD2, and PLGND and DAGND are connected to
DGND inside the LR38666Y.
Power ON/OFF Sequence
Two power supplies are used with the LR38666Y.
One (DVDD) is used for I/O buffer and the other
(DVDD2) is used for the core logic circuits.
Power ON : Be sure to turn ON the internal power
supply of DVDD2 first.
Power OFF : Be sure to turn OFF the I/O buffer of
DVDD first.
Recommended DAC Circuit (Example)
DAVDD
DAVDD
Analog Output
DAVDD
CVR
RB1
RB2
ROUT
VREF
RREF
YCOUT/COUT
DVREF1/2
DIREF1/2
CVB
VB1/2
DAGND
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