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PDF MC100LVELT20 Data sheet ( Hoja de datos )

Número de pieza MC100LVELT20
Descripción LVTTL/LVCMOS to Differential LVPECL Translator
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No Preview Available ! MC100LVELT20 Hoja de datos, Descripción, Manual

MC100LVELT20
3.3 V LVTTL/LVCMOS to
Differential LVPECL
Translator
Description
The MC100LVELT20 is a 3.3 V TTL/CMOS to differential PECL
translator. Because PECL (Positive ECL) levels are used, only + 3.3 V
and ground are required. The small outline SOIC8 package and the
single gate of the MC100LVELT20 makes it ideal for those
applications where space, performance, and low power are at a
premium.
The 100 Series contains temperature compensation.
Features
390 ps Typical Propagation Delay
Maximum Input Clock Frequency > 0.8 GHz Typical
Operating Range VCC = 3.0 V to 3.6 V with GND = 0 V
PNP TTL Input for Minimal Loading
Q Output will Default HIGH with Input Open
These Devices are Pb-Free, Halogen Free and are RoHS Compliant
www.onsemi.com
8
1
SOIC8 NB
D SUFFIX
CASE 75107
MARKING DIAGRAM
8
KVT20
ALYW
G
1
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
G = Pb-Free Package
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
Device
Package Shipping
MC100LVELT20DG
SOIC8 NB
(Pb-Free)
MC100LVELT20DR2G SOIC-8 NB
(Pb-Free)
98 Units/Tube
2500/Tape & Reel
†For information on tape and reel specifications, in-
cluding part orientation and tape sizes, please refer
to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2016
July, 2016 Rev. 1
1
Publication Order Number:
MC100LVELT20/D

1 page




MC100LVELT20 pdf
MC100LVELT20
Resource Reference of Application Notes
AN1405/D ECL Clock Distribution Techniques
AN1406/D Designing with PECL (ECL at +5.0 V)
AN1503/D ECLinPSt I/O SPiCE Modeling Kit
AN1504/D Metastability and the ECLinPS Family
AN1568/D Interfacing Between LVDS and ECL
AN1672/D The ECL Translator Guide
AND8001/D Odd Number Counters Design
AND8002/D Marking and Date Codes
AND8020/D Termination of ECL Logic Devices
AND8066/D Interfacing with ECLinPS
AND8090/D AC Characteristics of ECL Devices
www.onsemi.com
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