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Número de pieza | MC74AC377 | |
Descripción | OCTAL D FLIP-FLOP | |
Fabricantes | Motorola Semiconductors | |
Logotipo | ||
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No Preview Available ! MC74AC377
MC74ACT377
Octal D FlipĆFlop
with Clock Enable
The MC74AC377/74ACT377 has eight edge-triggered, D-type flip-flops with
individual D inputs and Q outputs. The common buffered Clock (CP) input loads
all flip-flops simultaneously, when the Clock Enable (CE) is LOW.
The register is fully edge-triggered. The state of each D input, one setup time
before the LOW-to-HIGH clock transition, is transferred to the corresponding flip-
flop’s Q output. The CE input must be stable only one setup time prior to the
LOW-to-HIGH clock transition for predictable operation.
• Ideal for Addressable Register Applications
• Clock Enable for Address and Data Synchronization Applications
• Eight Edge-Triggered D Flip-Flops
• Buffered Common Clock
• Outputs Source/Sink 24 mA
• See MC74AC273 for Master Reset Version
• See MC74AC373 for Transparent Latch Version
• See MC74AC374 for 3-State Version
• ′ACT377 Has TTL Compatible Inputs
www.DataSheet4U.com
VCC O7 D7 D6 O6 O5 D5 D4 O4 CP
20 19 18 17 16 15 14 13 12 11
1 2 3 4 5 6 7 8 9 10
CE O0 D0 D1 O1 O2 D2 D3 O3 GND
PIN NAMES
D0–D7
CE
Q0–Q7
CP
Data Inputs
Clock Enable (Active LOW)
Data Outputs
Clock Pulse Input
MODE SELECT-FUNCTION TABLE
Operating Mode
Inputs
CP CE Dn
Load ′1′
LH
Load ′0′
LL
Hold (Do Nothing)
HX
XHX
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
= LOW-to-HIGH Clock Transition
Outputs
Qn
H
L
No Change
No Change
FACT DATA
5-1
OCTAL D
FLIP-FLOP WITH
CLOCK ENABLE
N SUFFIX
CASE 738-03
PLASTIC
DW SUFFIX
CASE 751D-04
PLASTIC
LOGIC SYMBOL
D0 D1 D2 D3 D4 D5 D6 D7
CP
CE
O0 O1 O2 O3 O4 O5 O6 O7
1 page MC74AC377 MC74ACT377
AC CHARACTERISTICS (For Figures and Waveforms — See Section 3)
74ACT
Symbol
Parameter
VCC*
(V)
TA = +25°C
CL = 50 pF
fmax
Maximum Clock
Frequency
tPLH
Propagation Delay
CP to Qn
tPHL
Propagation Delay
CP to Qn
* Voltage Range 5.0 V is 5.0 V ±0.5 V.
Min Typ Max
5.0 140
5.0 3.0
9.0
5.0 3.5
10
74ACT
TA = –40°C
to +85°C
CL = 50 pF
Min Max
125
2.5 10
2.5 11
Unit
MHz
ns
ns
Fig.
No.
3-3
3-6
3-6
AC OPERATING REQUIREMENTS
Symbol
Parameter
ts
Setup Time, HIGH or LOW
Dn to CP
th
Hold Time, HIGH or LOW
Dn to CP
ts
Setup Time, HIGH or LOW
CE to CP
th
Hold Time, HIGH or LOW
CE to CP
tw
CP Pulse Width
HIGH or LOW
* Voltage Range 5.0 V is 5.0 V ±0.5 V.
74ACT
74ACT
VCC*
(V)
TA = +25°C
CL = 50 pF
TA = –40°C
to +85°C
CL = 50 pF
Unit
Fig.
No.
Typ Guaranteed Minimum
5.0 4.5 5.5 ns 3-9
5.0 1.0 1.0 ns 3-9
5.0 4.5 5.5 ns 3-9
5.0 1.0 1.0 ns 3-9
5.0 4.0 4.5 ns 3-6
CAPACITANCE
Symbol
Parameter
CIN
CPD
Input Capacitance
Power Dissipation Capacitance
Value
Typ
4.5
90
Unit
pF
pF
Test Conditions
VCC = 5.0 V
VCC = 5.0 V
FACT DATA
5-5
5 Page |
Páginas | Total 6 Páginas | |
PDF Descargar | [ Datasheet MC74AC377.PDF ] |
Número de pieza | Descripción | Fabricantes |
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MC74AC374 | OCTAL D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS | Motorola Semiconductors |
MC74AC374 | Octal D-Type Flip-Flop | ON Semiconductor |
MC74AC377 | Octal D Flip-Flop | ON Semiconductor |
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