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Teilenummer | MAX708 |
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Beschreibung | (MAX707 / MAX708) UP Supervisory Circuits | |
Hersteller | ON Semiconductor | |
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Gesamt 10 Seiten www.DataSheet4U.com
MAX707, MAX708
mP Supervisory Circuits
The MAX707/708 are cost−effective system supervisor circuits
designed to monitor VCC in digital systems and provide a reset signal
to the host processor when necessary. No external components are
required.
The reset output is driven active within 20 msec of VCC falling
through the reset voltage threshold. Reset is maintained with 200 mS
of delay time after VCC rise above the reset threshold. The
MAX707/708 have a low quiescent current of 12 mA at VCC = 3.3 V,
an active−high RESET and active−low RESET with a push−pull
output. The output is guaranteed valid down to VCC = 1.0 V. The
MAX707/708 have a Manual Reset MR input and a +1.25 V threshold
detector for power−fail input PFI. These devices are available in a
Micro8 and SOIC−8 package.
Features
• Precision Supply−Voltage Monitor
MAX707: 4.63 V Reset Threshold Voltage
MAX708: Standard Reset Threshold Voltages (Typical):
4.38 V, 3.08 V, 2.93 V, 2.63 V
• Reset Threshold Available from 1.6 V to 4.9 V with 100 mV
Increments (Factory Option)
• 200 mS (Typ) Reset Timeout Delay
• 12 mA (VCC = 3.3 V) Quiescent Current
• Active_High and Active_Low Reset Output
• Guaranteed RESET_L and RESET Output Valid to VCC = 1.0 V
• Voltage Monitor for Power−Fail or Low−Battery Warning
• 8 Pin SOIC or Micro8 Package
• Pb−Free Packages are Available
Applications
• Computers
• Embedded System
• Battery Powered Equipment
• Critical mP Power Supply Monitor
© Semiconductor Components Industries, LLC, 2005
August, 2005 − Rev. 4
1
http://onsemi.com
MARKING
DIAGRAMS
8
8
Micro8t
CUA SUFFIX
xxx
AYW
CASE 846A
G
11
xxx = Specific Device Code
A = Assembly Location
Y = Year
W = Week
G = Pb−Free Package
8
1
SOIC−8
ESA SUFFIX
CASE 751
8
xxxxx
ALYWG
G
1
xxxxx = Specific Device Code
AL = Assembly Lot Code
Y = Year
W = Week
G = Pb−Free Package
(Note: Microdot may be in either location)
PIN CONFIGURATION
Micro8
RESET 1
RESET 2
MR 3
VCC 4
8 NC
7 PFO
6 PFI
5 GND
(Top View)
SOIC−8
MR 1
8 RESET
VCC 2
GND 3
7 RESET
6 NC
PFI 4
5 PFO
(Top View)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 8 of this data sheet.
Publication Order Number:
MAX707/D
MAX707, MAX708
APPLICATIONS INFORMATION
Microprocessor Reset
To generate a processor reset, the manual Reset input
allows different reset sources. A pushbutton switch can be
one of these. It is effectively debounced by the 1.0 ms
minimum reset pulse width. As MR is TTL/CMOS logic
compatible, it can be driven by an external logic line.
VCC
VTH
RESET
VTH
tRP
tRP
MR
tMD
tMR
Figure 12. RESET and MR Timing
VCC Transient Rejection
The MAX707/708 provides accurate VCC monitoring and
reset timing during power−up, power−down, and
brownout/sag conditions, and rejects negative glitches on
the power supply line. Figure 13 shows the maximum
transient duration vs. maximum negative excursion
(overdrive) for glitch rejection. For a given overdrive, the
point of the curve is the maximum width of the glitch
allowed before the device generates a reset signal. Transient
immunity can be improved by adding a capacitor (100 nF for
example) in close proximity to the VCC pin of the
MAX707/708.
300
250
200
VTH = 4.90 V
150
VTH = 3.08 V
100
VTH = 1.60 V
50
0
10 30 50 70 90 110 130 150
RESET COMPARATOR OVERDRIVE (mV)
Figure 13. Maximum Transient Duration vs.
Overdrive for Glitch Rejection at 255C
VCC
VTH
Duration
Overdrive
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6 Page | ||
Seiten | Gesamt 10 Seiten | |
PDF Download | [ MAX708 Schematic.PDF ] |
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