|
|
PDF FIN324C Data sheet ( Hoja de datos )
| Número de pieza | FIN324C | |
| Descripción | 24-Bit Ultra-Low Power Serializer Deserializer Supporting Single and Dual Displays | |
| Fabricantes | Fairchild Semiconductor | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de FIN324C (archivo pdf) en la parte inferior de esta página. Total 23 Páginas | ||
|
No Preview Available !
www.DataSheet4U.com
March 2007
FIN324C
24-Bit Ultra-Low Power Serializer Deserializer
Supporting Single and Dual Displays
Features
Ultra-Low Operating Power: ~4mA at 5.44MHz
Supports Dual-Display Implementations with RGB
or Microcontroller Interface
No External Timing Reference Needed
SPI Mode Support
Single Device Operates as a Serializer or
Deserializer
Direct Support for Motorola®-Style R/W
Microcontroller Interface
Direct Support for Intel®-Style /WE, /RE
Microcontroller Interface
15MHz Maximum Strobe Frequency
Utilizes Fairchild’s Proprietary CTL Serial I/O
Technology
Available in BGA and MLP packages
Wide Parallel Supply Voltage Range: 1.60 to 3.0V
Low Power Core Operation: VDDS/A=2.5 to 3.0V
Voltage Translation Capability Across Pair with No
External Components
High ESD protection: >14.5kV HBM
Power-Saving Burst-Mode Operation
Applications
Single or Dual 16/18-Bit RGB Cell Phone Displays
Single or Dual 16/18-Bit Cell Phone Displays with
Microcontroller Interface
Single or Dual Mobile Display at QVGA or HVGA
Resolution
Description
The FIN324C is a 24-bit serializer / deserializer with dual
strobe inputs. The device can be configured as a master
or slave device through the master/slave select pin
(M/S). This allows for the same device to be used as
either a serializer or deserializer, minimizing component
types in the system. The dual strobe inputs allow
implementation of dual-display systems with a single
pair of µSerDes. The FIN324C can accommodate RGB,
microcontroller, or SPI mode interfaces. Read and write
transactions are supported when operating with a
Motorola-style microcontroller interface for one or both
displays. Unlike other SerDes solutions, no external
timing reference is required for operation.
The FIN324C is designed for ultra-low power operation.
Reset (/RES) and standby (/STBY) signals put the
device in an ultra-low power state. In standby mode, the
outputs of the slave device maintain state, allowing the
system to resume operation from the last-known state.
The device utilizes Fairchild’s proprietary ultra-low power,
low-EMI Current Transfer Logic™ (CTL) technology. The
serial interface disables between transactions to minimize
EMI at the fundamental serial interface and to conserve
power. LV-CMOS parallel output buffers have been
implemented with slew rate control to adjust for capacitive
loading and to minimize EMI.
The serialization bit clock is generated internally to the
FIN324C. The minimum bit clock frequency is always
great enough to handle the maximum strobe frequency.
Related Application Notes
AN-5058 µSerDes™ Family Frequently Asked
Questions
AN-5061 µSerDes™ Layout Guidelines
AN-6047 FIN324C Reset and Standby
© 2006 Fairchild Semiconductor Corporation
FIN324C Rev. 1.0.5
www.fairchildsemi.com
1 page  
Pin Assignments
42 FBGA Package
3.5mm x 4.5mm
(.5mm Pitch)
(Top View)
123456
A
B
C
D
E
F
G
Pin Assignments
1
A R/W
B CKSEL
(H)
C GND
2
{SDAT}
CNTL[4]
{SCLK}
CNTL[5]
VDDP
34
CNTL[2]
CNTL[3]
CNTL[1]
STRB0
(WCLK0)
STRB1
(WCLK1)
CNTL[0]
5
DP[17]
DP[15]
DP[13]
6
DP[16]
DP[14]
DP[12]
D CKS+
(DS+)
E CKS-
(DS-)
F DS-
(CKS-)
G DS+
(CKS+)
GND
VDDS
VDDA
/RES
M/S
DP[11]
DP[9]
DP[10]
GND
PAR/SPI
/STBY
(SLEW)
DP[2]
DP[0]
DP[1]
DP[7]
({SDAT})
DP[4]
DP[3]
DP[8]
DP[6]
({SCLK})
DP[5]
Figure 2. BGA Pin Assignments
CKSEL(H) 1
CKS+(DS+) 2
CKS-(DS-) 3
VDDS 4
VDDA 5
DS-(CKS-) 6
DS+(CKS+) 7
/RES 8
PAR/SPI 9
M/S 10
Ground Pad
30 DP[16]
29 DP[15]
28 DP[14]
27 DP[13]
26 DP[12]
25 VDDP
24 DP[11]
23 DP[10]
22 DP[9]
21 DP[8]
Figure 3. MLP Pin Assignments (40 Pins, 6x6mm, .5mm Pitch, Top View)
© 2006 Fairchild Semiconductor Corporation
FIN324C Rev. 1.0.5
5
www.fairchildsemi.com
5 Page 
Application Diagrams (Continued)
Baseband
Processor
/RE
/WE
DATA[17:0]
ADDR
/CS0
/CS1
GPIO
/STBY
/RES
CKSEL0
CKSEL1
VDDP1 VDDS/A
C2 E2 F2
VDDP VDDS/A
A4 STRB0
B4 STRB1
D4:G6
C4
C3
A3
B3
A2
B2
A1
VDDP1D3
F3
G3
G2
B1
DP[17:0]
CNTL[0]
CNTL[1]
CNTL[2]
CNTL[3]
CKS+ D1
CKS- E1
CNTL[4]
CNTL[5]
R/W
M/S
DS+ G1
DS- F1
PAR/SPI
/STBY
/RES
CKSEL
E3
D2
C1
Module 1
VDDP2 VDDS/A
C2 E2 F2
VDDP VDDS/A
WCLK0 A4
WCLK1 B4
DP[17:0] D4:G6
CNTL[0] C4
CNTL[1] C3
G1
F1
CKS+ CNTL[2] A3
CKS- CNTL[3] B3
D1
E1
DS+
DS-
CNTL[4] A2 NC
CNTL[5] B2 NC
R/W A1
M/S D3
PAR/SPI F3
VDDP2
E3 SLEW G3
D2 /RES G2
C1 H B1
Sub-Display
/RE
/WE
DATA[7:0]
ADDR
/CS0
Main Display
/RE
/WE
DATA[17:0]
ADDR
/CS1
Edge Rate Control Option
SLEW must be connected
to VDDS or GND for low
power.
Notes:
1.
2.
3.
4.
5.
Dual display R/W Intel® interface.
Assumes BGA die on display.
GPIO signal used to select READ or WRITE functionality. Connected to CKSEL and R/W.
Displays selected via the c.hip selects.
Pin numbers for BGA package.
Figure 10. Dual R/W x86-Style Microcontroller Display Interface
Additional Application Information
Flex Cabling: The serial I/O information is transmitted at a high serial rate. Care must be taken implementing this
serial I/O flex cable. The following best practices should be used when developing the flex cabling or Flex PCB.
Keep all four differential Serial Wires the same length.
Do not allow noisy signals over or near differential serial wires.
Example: No LVCMOS traces over differential serial wires.
Use only one ground plane or wire over the differential serial wires. Do not run ground over top and bottom.
Design goal of 100-ohms differential characteristic impedance.
Do not place test points on differential serial wires.
Use differential serial wires a minimum of 2cm away from the antenna.
For additional applications notes or flex guidelines see your sales rep or contact Fairchild directly.
© 2006 Fairchild Semiconductor Corporation
FIN324C Rev. 1.0.5
11
www.fairchildsemi.com
11 Page | ||
| Páginas | Total 23 Páginas | |
| PDF Descargar | [ Datasheet FIN324C.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| FIN324C | 24-Bit Ultra-Low Power Serializer Deserializer Supporting Single and Dual Displays | Fairchild Semiconductor |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |