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Teilenummer | 74VCXH16373 |
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Beschreibung | Low-Voltage 1.8/2.5/3.3 V 16-Bit Transparent Latch | |
Hersteller | ON Semiconductor | |
Logo | ||
Gesamt 11 Seiten www.DataSheet4U.com
74VCXH16373
Low−Voltage 1.8/2.5/3.3 V
16−Bit Transparent Latch
With 3.6 V−Tolerant Inputs and Outputs
(3−State, Non−Inverting)
The 74VCXH16373 is an advanced performance, non−inverting
16−bit transparent latch. It is designed for very high−speed, very
low−power operation in 1.8 V, 2.5 V or 3.3 V systems. The
VCXH16373 is byte controlled, with each byte functioning
identically, but independently. Each byte has separate Output Enable
and Latch Enable inputs. These control pins can be tied together for
full 16−bit operation.
When operating at 2.5 V (or 1.8 V) the part is designed to tolerate
voltages it may encounter on either inputs or outputs when interfacing
to 3.3 V busses. It is guaranteed to be overvoltage tolerant to 3.6 V.
The 74VCXH16373 contains 16 D−type latches with 3−state
3.6 V−tolerant outputs. When the Latch Enable (LEn) inputs are
HIGH, data on the Dn inputs enters the latches. In this condition, the
latches are transparent, (a latch output will change state each time its D
input changes). When LE is LOW, the latch stores the information that
was present on the D inputs a setup time preceding the
HIGH−to−LOW transition of LE. The 3−state outputs are controlled
by the Output Enable (OEn) inputs. When OE is LOW, the outputs are
enabled. When OE is HIGH, the standard outputs are in the high
impedance state, but this does not interfere with new data entering into
the latches. The data inputs include active bushold circuitry,
eliminating the need for external pullup resistors to hold unused or
floating inputs at a valid logic state.
Features
• Designed for Low Voltage Operation: VCC = 1.65 V − 3.6 V
• 3.6 V Tolerant Inputs and Outputs
• High Speed Operation: 3.0 ns max for 3.0 V to 3.6 V
3.9 ns max for 2.3 V to 2.7 V
6.8 ns max for 1.65 V to 1.95 V
• Static Drive: ±24 mA Drive at 3.0 V
±18 mA Drive at 2.3 V
±6 mA Drive at 1.65 V
• Supports Live Insertion and Withdrawal
• Includes Active Bushold to Hold Unused or Floating Inputs at
a Valid Logic State
• IOFF Specification Guarantees High Impedance When VCC = 0 V*
• Near Zero Static Supply Current in All Three Logic States (20 mA)
Substantially Reduces System Power Requirements
• Latchup Performance Exceeds ±250 mA @ 125°C
• ESD Performance: Human Body Model >2000 V
Machine Model >200 V
• Pb−Free Package is Available**
*To ensure the outputs activate in the 3−state condition,
the output enable pins should be connected to VCC through a
pull−up resistor. The value of the resistor is determined by the
current sinking capability of the output connected to the OE pin.
© Semiconductor Components Industries, LLC, 2006
June, 2006 − Rev. 6
1
http://onsemi.com
48
1
TSSOP−48
DT SUFFIX
CASE 1201
MARKING DIAGRAM
48
VCXH16373
AWLYYWW
1
A = Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
Pins
OEn
LEn
D0−D15
O0−O15
PIN NAMES
Function
Output Enable Inputs
Latch Enable Inputs
Inputs
Outputs
ORDERING INFORMATION
Device
74VCXH16373DT
Package
TSSOP
Shipping†
39 / Rail
74VCXH16373DTR TSSOP 2500/Tape & Reel
74VCXH16373DTRG TSSOP 2500/Tape & Reel
(Pb−Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
**For additional information on our Pb−Free strategy
and soldering details, please download the
ON Semiconductor Soldering and Mounting
Techniques Reference Manual, SOLDERRM/D.
Publication Order Number:
74VCXH16373/D
74VCXH16373
DYNAMIC SWITCHING CHARACTERISTICS
TA = +25°C
Symbol
Characteristic
Condition
Typ Unit
VOLP
Dynamic LOW Peak Voltage
(Note 9)
VCC = 1.8 V, CL = 30 pF, VIH = VCC, VIL = 0 V
VCC = 2.5 V, CL = 30 pF, VIH = VCC, VIL = 0 V
0.25
0.6
V
VCC = 3.3 V, CL = 30 pF, VIH = VCC, VIL = 0 V
0.8
VOLV
Dynamic LOW Valley Voltage
(Note 9)
VCC = 1.8 V, CL = 30 pF, VIH = VCC, VIL = 0 V
VCC = 2.5 V, CL = 30 pF, VIH = VCC, VIL = 0 V
−0.25
−0.6
V
VCC = 3.3 V, CL = 30 pF, VIH = VCC, VIL = 0 V
−0.8
VOHV
Dynamic HIGH Valley Voltage
(Note 10)
VCC = 1.8 V, CL = 30 pF, VIH = VCC, VIL = 0 V
VCC = 2.5 V, CL = 30 pF, VIH = VCC, VIL = 0 V
1.5
1.9
V
VCC = 3.3 V, CL = 30 pF, VIH = VCC, VIL = 0 V
2.2
9. Number of outputs defined as “n”. Measured with “n−1” outputs switching from HIGH−to−LOW or LOW−to−HIGH. The remaining output is
measured in the LOW state.
10. Number of outputs defined as “n”. Measured with “n−1” outputs switching from HIGH−to−LOW or LOW−to−HIGH. The remaining output is
measured in the HIGH state.
CAPACITIVE CHARACTERISTICS
Symbol
Parameter
CIN Input Capacitance
COUT
Output Capacitance
CPD Power Dissipation Capacitance
11. VCC = 1.8 V, 2.5 V or 3.3 V; VI = 0 V or VCC.
Condition
Note 11
Note 11
Note 11, 10 MHz
Typical
6
7
20
Unit
pF
pF
pF
http://onsemi.com
6
6 Page | ||
Seiten | Gesamt 11 Seiten | |
PDF Download | [ 74VCXH16373 Schematic.PDF ] |
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