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ZL49021 Schematic ( PDF Datasheet ) - Zarlink Semiconductor

Teilenummer ZL49021
Beschreibung (ZL49010 - ZL49031) Wide Dynamic Range DTMF Receiver
Hersteller Zarlink Semiconductor
Logo Zarlink Semiconductor Logo 




Gesamt 14 Seiten
ZL49021 Datasheet, Funktion
www.DataSheet4U.com
ZL49010/1, ZL49020/1, ZL49030/1
Wide Dynamic Range DTMF Receiver
Data Sheet
Features
• Wide dynamic range (50dB) DTMF Receiver
• Call progress (CP) detection via cadence
indication
• 4-bit synchronous serial data output
• Software controlled guard time for ZL490x0
• Internal guard time circuitry for ZL490x1
• Powerdown option (ZL4901x & ZL4903x)
• 3.579MHz crystal or ceramic resonator (ZL4903x
and ZL4902x)
• External clock input (ZL4901x)
• Guarantees non-detection of spurious tones
Applications
• Integrated telephone answering machine
• End-to-end signalling
• Fax Machines
Description
The ZL490xx is a family of high performance DTMF
receivers which decode all 16 tone pairs into a 4-bit
binary code. These devices incorporate an AGC for
wide dynamic range and are suitable for end-to-end
signalling. The ZL490x0 provides an early steering
(ESt) logic output to indicate the detection of a DTMF
September 2003
Ordering Information
ZL49010DAA
ZL49011DAA
ZL49020DAA
ZL49021DAA
ZL49030DCA
ZL49030DCB
ZL49030DDA
ZL49030DDB
ZL49031DCA
ZL49031DCB
ZL49031DDA
ZL49031DDB
8 Pin PDIP Tubes
8 Pin PDIP Tubes
8 Pin PDIP Tubes
8 Pin PDIP Tubes
18 Pin SOIC Tubes
18 Pin SOIC Tape & Reel
20 Pin SSOP Tubes
20 Pin SSOP Tape & Reel
18 Pin SOIC Tubes
18 Pin SOIC Tape & Reel
20 Pin SSOP Tubes
20 Pin SSOP Tape & Reel
-40°C to +85°C
signal and requires external software guard time to
validate the DTMF digit. The ZL490x1, with preset
internal guard times, uses a delay steering (DStD)
logic output to indicate the detection of a valid DTMF
digit. The 4-bit DTMF binary digit can be clocked out
synchronously at the serial data (SD) output. The SD
pin is multiplexed with call progress detector output. In
the presence of supervisory tones, the call progress
1
PWDN
VDD
VSS
Voltage
Bias Circuit
AGC
Anti-
alias
Filter
Dial
Tone
Filter
2
OSC2
OSC1
(CLK)
Oscillator
and
Clock
Circuit
To All Chip Clocks
1. ZL49010/1 and ZL49030/1 only.
2. ZL49020/1 and ZL49030/1 only.
3. ZL490x1 only.
High
Group
Filter
Low
Group
Filter
Steering
Circuit
Digital
Detector
Algorithm
Code
Converter
and
Latch
Energy
Detection
Figure 1 - Functional Block Diagram
Digital
Guard
Time3
Parallel to
Serial
Converter
& Latch
Mux
ESt
or
DStD
ACK
SD
1
Zarlink Semiconductor Inc.
Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.
Copyright 2003, Zarlink Semiconductor Inc. All Rights Reserved.






ZL49021 Datasheet, Funktion
ZL49010/1, ZL49020/1, ZL49030/1
Data Sheet
Applications
The circuit shown in Figure 3 illustrates the use of a ZL4902x in a typical receiver application. It requires only a
coupling capacitor (C1) and a crystal or ceramic resonator (X1) to complete the circuit.
The ZL490x0 is designed for user who wishes to tailor the guard time for specific applications. When a DTMF
signal is present, the ESt pin will go high. An external microcontroller monitors ESt in real time for a period of time
set by the user. A guard time algorithm must be implemented such that DTMF signals not meeting the timing
requirements are rejected. The ZL490x1 uses an internal counter to provide a preset DTMF validation period. It
requires no external components. The DStD output high indicates that a valid DTMF digit has been detected.
DTMF/CP Input
C1
X1
COMPONENTS LIST:
C1 = 0.1 µF ± 10 %
X1 = Crystal or Resonator (3.579MHz)
1 INPUT
ZL4902x
VDD 8
2 OSC2
3
OSC1
7
ESt/DStD
ACK 6
4
VSS
5
SD
VDD
To microprocessor or
microcontroller
Figure 3 - Application Circuit for ZL4902x
6
Zarlink Semiconductor Inc.

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