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PDF MTV130 Data sheet ( Hoja de datos )

Número de pieza MTV130
Descripción On-Screen Display
Fabricantes Myson 
Logotipo Myson Logotipo



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No Preview Available ! MTV130 Hoja de datos, Descripción, Manual

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MYSON
TECHNOLOGY
MTV130
On-Screen Display for LCD Monitor
FEATURES
• Horizontal SYNC input up to 150 KHz.
• Acceptable wide-range pixel clock up to 150 MHz.
• Full screen self-test pattern generator.
• Full-screen display consists of 15 (rows) by 30 (columns)
characters.
• Two font size 12x16 or 12x18 dot matrix per character.
• True totally 512 mask ROM fonts including 496 standard
fonts and 16 multi-color fonts.
• 8 color selection maximum per display character.
• Double character height and/or width control.
• Programmable positioning for display screen center.
• Character bordering, shadowing and blinking effect.
• Programmable character height (18 to 71 lines) control.
• Row to row spacing control to avoid expansion distortion.
• 4 programmable windows with multi-level operation.
• Shadowing on windows with programmable shadow
width/height/color.
• Software clears bit for full-screen erasing.
• Intensity and fast blanking output.
• Fade-in/fade-out or blending-in/blending-out effects.
• 4-channel/8-bit PWM D/A converter output.
• Compatible with SPI bus or I2C interface with slave
address 7AH (slave address is mask option).
• 16-pin or 20-pin PDIP/SOP package.
GENERAL DESCRIPTION
MTV130 is designed for LCD monitor applications to
display built-in characters or fonts onto an LCD monitor
screens. The display operation occurs by transferring data
and control information from the micro-controller to RAM
through a serial data interface. It can execute full-screen
display automatically, as well as specific functions such as
character background, bordering, shadowing, blinking,
double height and width, font by font color control, frame
positioning, frame size control by character height and row-
to-row spacing, horizontal display resolution, full-screen
erasing, fade-in/fade-out effect, windowing effect, shadow-
ing on window and full-screen self-test pattern generator.
MTV130 provides true 512 fonts including 496 standard
fonts and 16 multi-color fonts and 2 font sizes, 12x16 or
12x18 for more efficacious applications. So each one of the
512 fonts can be displayed at the same time. The full OSD
menu is formed by 15 rows x 30 columns, which can be
positioned anywhere on the monitor screen by changing
vertical or horizontal delay.
BLOCK DIAGRAM
SSB
SCK
SDA
VFLB
HFLB
NC
XIN
SERIAL DATA
INTERFACE
8 DATA
9 ROW, COL
ACK
ARWDB
HDREN
VDREN
NROW
ADDRESS BUS
ADMINISTRATOR
5 RCADDR
9 DADDR
9 FONTADDR
5 WINADDR
5 PWMADDR
VSP CH 7
CHS
VERTD 8
VERTICAL
DISPLAY
CONTROL
5 LPN
NROW
VDREN
HORIZONTAL
ARWDB
HSP HORD 8 DISPLAY CONTROL HDREN
CLOCK
GENERATOR
VCLKX
PWM0
PWM1
PWM2
PWM3
PWM D/A
CONVERTER
8 DATA
DATA 8
CWS
CHS
DISPLAY & ROW
CONTROL
REGISTERS
LUMAR
LUMAG
LUMAB
BLINK
8 CRADDR
DATA 8
LPN 5
CWS
VCLKS
CHARACTER ROM
USER FONT RAM
LUMINANCE &
BORDGER
GENERATOR
LUMA
BORDER
DATA 8
8 VERTD
8 HORD
7 CH
WINDOWS &
FRAME
CONTROL
BSEN
SHADOW
OSDENB
HSP
VSP
LUMAR
LUMAG
LUMAB
BLINK
VCLKX
COLOR
ENCODER
POWER ON
RESET
PRB
VDD
VSS
VDDA
VSSA
ROUT
GOUT
BOUT
FBKG
HTONE
This datasheet contains new product information. Myson Technology reserves the rights to modify the product specification without notice.
No liability is assumed as a result of the use of this product. No rights under any patent accompany the sales of the product.
Revision 1.0
1/18
28/April/2000

1 page




MTV130 pdf
MYSON
TECHNOLOGY
MTV130
0, X
Initiate
Input = b7, b6
1, X
format (a)
1, X ROW
format (c)
0, 1
0, 0 format (b)
0, 0
COL c
X, X
0, 1 COL ab X, X
1, X
X, X DA c
DA ab
FIGURE 3. Transmission State Diagram
3.2 Address bus administrator
The administrator manages bus address arbitration of internal registers or user fonts RAM during external
data write in. The external data write through serial data interface to registers must be synchronized by inter-
nal display timing. In addition, the administrator also provides automatic increment to address bus when exter-
nal write using format (c).
3.3 Vertical display control
The vertical display control can generates different vertical display sizes for most display standards in current
monitors. The vertical display size is calculated with the information of double character height bit(CHS), verti-
cal display height control register(CH6-CH0).The algorithm of repeating character line display are shown as
Table 2 and Table 3. The programmable vertical size range is 270 lines to maximum 2130 lines.
The vertical display center for full screen display could be figured out according to the information of vertical
starting position register (VERTD) and VFLB input. The vertical delay starting from the leading edge of VFLB,
is calculated with the following equation:
Vertical delay time = ( VERTD * 4 + 1 ) * H
TABLE 2. Repeat line weight of character
CH6 - CH0
CH6,CH5=11
CH6,CH5=10
CH6,CH5=0x
CH4=1
CH3=1
CH2=1
CH1=1
CH0=1
Repeat Line Weight
+18*3
+18*2
+18
+16
+8
+4
+2
+1
Where H = one horizontal line display time
Revision 1.0
5/18
28/April/2000

5 Page





MTV130 arduino
MYSON
TECHNOLOGY
MTV130
Fonts designed to be 12x18 display
Output display if FSS=0; first and last lines omitted
FIGURE 7. 12x18 and 12x16 Fonts
DWE - Enable double width. When the bit is set to “1”, the display of OSD menu can change to half resolution
for double character width, and then the number of pixels of each line should be even. The initial value
is 0 after power up.
HSP -
= 1 Accept positive polarity Hsync input.
= 0 Accept negative polarity Hsync input.
VSP -
= 1 Accept positive polarity Vsync input.
= 0 Accept negative polarity Vsync input.
PWM1, PWM0 - Select the PWMCK output frequency.
= (0, 0) XIN frequency /8
= (0, 1) XIN frequency /4
= (1, 0) XIN frequency /2
= (1, 1) XIN frequency /1
The initial value is (0, 0) after power up.
Notes : When XIN is not present, don’t write data in any address. If data is written in any other address, a
malfunction may occur.
TABLE 5. PWMCK Frequency and PWMDA sampling rate
(PWM1, PWM0)
( 0, 0 )
( 0, 1 )
( 1, 0 )
( 1 ,1 )
PWMCK Freq
XIN frequency /8
XIN frequency /4
XIN frequency /2
XIN frequency /1
PWMDA sampling rate
XIN frequency /(8 * 256)
XIN frequency /(4 * 256)
XIN frequency /(2 * 256)
XIN frequency /(1 * 256)
B7 b6 b5 b4 b3 b2 b1 b0
Column 19
-
-
-
-
- CSR CSG CSB
CSR, CSG, CSB - Define the color of bordering or shadowing on characters. The initial value is (0, 0, 0) after
power up.
B7 b6 b5 b4 b3 b2 b1 b0
Column 20 FSW
-
-
-
- FSR FSG FSB
FSW - Enable full screen self-test pattern and force the FBKG pin output to high to disable video RGB while
this bit is set to "1". The self-test pattern’s color is determined by (FSR, FSG, FSB) bits.
Revision 1.0
11/18
28/April/2000

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