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PDF 54ACTQ240 Data sheet ( Hoja de datos )

Número de pieza 54ACTQ240
Descripción Quiet Series Octal Buffer/Line Driver
Fabricantes National Semiconductor 
Logotipo National Semiconductor Logotipo



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No Preview Available ! 54ACTQ240 Hoja de datos, Descripción, Manual

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February 1999
54ACQ240 54ACTQ240
Quiet Series Octal Buffer/Line Driver with TRI-STATE®
Outputs
General Description
The ’ACQ/’ACTQ240 is an inverting octal buffer and line
driver designed to be employed as a memory address driver,
clock driver and bus oriented transmitter or receiver which
provides improved PC board density. The ’ACQ/’ACTQ uti-
lizes NSC Quiet Series technology to guarantee quiet output
switching and improve dynamic threshold performance.
FACT Quiet Seriesfeatures GTOoutput control and un-
dershoot corrector in addition to a split ground bus for supe-
rior performance.
n Guaranteed simultaneous switching noise level and
dynamic threshold performance
n Improved latch-up immunity
n Inverting TRI-STATE outputs drive bus lines or buffer
memory address registers
n Outputs source/sink 24 mA
n Faster prop delays than the standard ’ACT240
n 4 kV minimum ESD immunity
n Standard Microcircuit Drawing (SMD)
’ACTQ240: 5962-92184
Features
n ICC and IOZ reduced by 50%
Logic Symbol
Connection Diagrams
IEEE/IEC
Pin Assignment
for DIP and Flatpak
Pin Names
OE1, OE2
I0– I7
O0– O7
DS100235-1
Description
TRI-STATE Output Enable Inputs
Inputs
Outputs
GTOis a trademark of National Semiconductor Corporation.
TRI-STATE® is a registered trademark of National Semiconductor Corporation.
FACT® is a registered trademark of Fairchild Semiconductor Corporation.
FACT Quiet Seriesis a trademark of Fairchild Semiconductor Corporation.
© 1999 National Semiconductor Corporation DS100235
DS100235-2
Pin Assignment
for LCC
DS100235-3
www.national.com

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54ACTQ240 pdf
DC Characteristics for ’ACTQ Family Devices (Continued)
54ACTQ
Symbol
Parameter
VCC
TA =
Units
(V) −55˚C to +125˚C
Conditions
Guaranteed
Limits
ICCT
IOLD
Maximum
ICC/Input
Minimum Dynamic
(Note 10)
5.5
5.5
1.6
50
mA VI = VCC − 2.1V
mA VOLD = 1.65V Max
IOHD
ICC
Output Current
Maximum Quiescent
Supply Current
5.5
5.5
−50
80.0
mA VOHD = 3.85V Min
µA VIN = VCC
or GND (Note 11)
VOLP
VOLV
Quiet Output Maximum
Dynamic VOL
Quiet Output Minimum
Dynamic VOL
5.0
5.0
1.5V
−1.2V
V (Notes 12, 13)
V (Notes 12, 13)
Note 9: All outputs loaded; thresholds on input associated with output under test.
Note 10: Maximum test duration 2.0 ms, one output loaded at a time.
Note 11: ICC for 54ACTQ @ 25˚C is identical to 74ACTQ @ 25˚C.
Note 12: Plastic DIP package.
Note 13: Max number of Data Inputs defined as (n). n−1 Data Inputs are driven 0V to 3V. One Data Input @ VIN = GND.
Note 14: Max number of Data Inputs (n) switching. (n−1) Inputs switching 0V to 3V (’ACTQ). Input-under-test switching: 3V to threshold (VILD), 0V to threshold
(VIHD), f = 1 MHz.
AC Electrical Characteristics
Symbol
Parameter
VCC
(V)
(Note 15)
54ACQ
TA = −55˚C
to +125˚C
CL = 50 pF
Min Max
Units
Fig.
No.
tPHL, tPLH
Propagation Delay
Data to Output
3.3 1.0 12.5 ns
5.0 1.0 9.0
tPZL, tPZH
Output Enable Time
3.3 1.0 13.5 ns
5.0 1.0 10.0
tPHZ, tPLZ
Output Disable Time
3.3
1.0 11.0 ns
5.0 1.0 9.0
Note 15: Voltage Range 5.0 is 5.0V ±0.5V
Voltage Range 3.3 is 3.3 ±0.3V.
Note 16: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The speci-
fication applies to any outputs switching in the same direction, either HIGH to LOW (tOSHL) or LOW to HIGH (tOSLH). Parameter guaranteed by design.
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