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PDF HN29WB800 Data sheet ( Hoja de datos )
| Número de pieza | HN29WB800 | |
| Descripción | (HN29WB800 / HN29WT800) CMOS Flash Memory | |
| Fabricantes | Hitachi Semiconductor | |
| Logotipo |  |
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HN29WT800 Series
HN29WB800 Series
1048576-word × 8-bit / 524288-word × 16-bit CMOS Flash Memory
ADE-203-537A(Z)
Rev. 1.0
May. 9, 1997
Description
The Hitachi HN29WT800 Series, HN29WB800 Series are 1-Mword × 8-bit/512-kword × 16-bit CMOS Flash
Memory with DINOR (DIvided bitline NOR) type memory cells, that realize programming and erase
capabilities with a single 3.3 V power supply. The built-in Sequence Controller allows Automatic
Program/Erase without complex external control. HN29WT800 Series, HN29WB800 Series enable the low
power and high performance systems such as mobile, personal computing and communication products.
Features
• On-board single power supply (VCC): VCC = 3.3 V ± 0.3 V
• Access time: 80/100/120 ns (max)
• Low power dissipation:
ICC = 30 mA (max) (Read)
ICC = 200 µA (max) (Standby)
ICC = 40 mA (max) (Program)
ICC = 40 mA (max) (Erase)
ICC = 1 µA (typ) (Deep powerdown)
• Automatic page programming:
Programming time: 25 ms (typ)
Program unit: 128 word
• Automatic erase:
Erase time: 50 ms (typ)
Erase unit: Boot block; 8-kword/16-kbyte × 1
Parameter block; 4-kword/8-kbyte × 2
Main block; 16-kword/32-kbyte × 1
32-kword/64-kbyte × 15
This product is compatible with M5M29FB/T800xx by Ltd. Mitsubishi.
1 page  
Block Diagram
A8 to A18
A0 to A7
CE
OE
WE
WP
RP
BYTE
RDY/Busy
VCC
V SS
HN29WT800 Series, HN29WB800 Series
X-address
buffer
X-decorder
Y-address
buffer
Y-decorder
Status/ ID register
128-word page buffer
Boot block 8-kword
Parameter block 1 4-kword
Parameter block 2 4-kword
Main block 16-kword
Main block 32-kword
.
.
Main block 32-kword
Y-gate /Sens AMP.
Multiplexer
CUI WSM
Input/output buffers
I/O0 I/O15/A-1
CUI: Command User Interface
WSM: Write State Machine
5
5 Page 
HN29WT800 Series, HN29WB800 Series
Software Command Definition
First bus cycle
Second bus cycle
Third bus cycle
Command
Data
Data
Data
Operation
(I/O7 to Operation
(I/O7 Operation
(I/O7
mode Address I/O0)*1 mode Address to I/O0) mode Address to I/O0)
Read array (memory) Write ×
FFH
Read identifier codes Write ×
90H Read IA*2
ID*2
Read status register Write ×
70H Read ×
SRD*3
Clear status register Write ×
50H
Page program*5
Write ×
41H Write WA0*4 WD0*4 Write WA1 WD1
Block erase
Write ×
20H Write BA*6 D0H
Suspend
Write ×
B0H
Resume
Write ×
D0H
Read lock bit status Write ×
71H Read BA
I/O6*7
Lock bit
program/confirm
Write ×
77H Write BA
D0H
Erase all unlocked Write
blocks
×
A7H Write ×
D0H
Notes: 1. In the word mode, upper byte data (I/O8 to I/O15) is ignored.
2. IA = Identifier address, A0 = VIL (Manufacture code), A0 = VIH (Device code), ID = ID code,
BYTE = VIL: A-1, A1 to A18 = VIL, BYTE = VIH: A1 to A18 = VIL.
3. SRD = Status register data
4. WA = Write address, WD = Write data
5. BYTE = VIL: Write address and write data must be provided sequentially from 00H to FFH for A-1
to A6. Page size is 256 byte (256-byte × 8-bit).
BYTE = VIH: Write address and write data must be provided sequentially from 00H to 7FH for A0 to
A6. Page size is 128 word (128-word × 16-bit).
6. BA = Block address (A12 to A18), (Addresses except block address must be VIH)
7. I/O6 provides block lock status, I/O6 = 1: Block unlocked, I/O6 = 0: Block locked.
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet HN29WB800.PDF ] | |
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