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PDF MSM13R0000 Data sheet ( Hoja de datos )
| Número de pieza | MSM13R0000 | |
| Descripción | Universal Serial Bus Controller | |
| Fabricantes | OKI electronic | |
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Technical Brief
OKI
ASIC
PRODUCTS
W712
Universal Serial Bus Controller
0.5µm Technology
Mega Macrofunction
January 1997
1 page  
–––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––– s W712 USB Device Controller s
Clock
Z712a
DPLL
To USB Transceiver
Protocol Engine
W712
W712b
Status/Control
FIFO Control
Application
Interface
To
Application
Module
To FIFO’s
(data path)
To FIFO’s
(control)
To FIFO’s
(data path)
Figure 2. W712 Block Diagram
Clock
USB Cable
ASIC
Optional
External
DPLL
USB
Transceiver
DPLL
W712 Mega Macrofunction
Status/
Control
Protocol
Engine
FIFO
Control
Application
Interface
Application
Module
External
Module I/O
Data Path
FIFO(s)/ Data Path
Data Mux(s)
Figure 3. Example USB Mega Macrofunction Application
Oki Semiconductor
3
5 Page 
–––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––– s W712 USB Device Controller s
GLOSSARY
Term
Bandwidth
Bit
Bit Stuffing
Bulk Transfer
Control Transfer
CRC
Cyclic Redundancy Check
Device Endpoint
Endpoint
Interrupt Transfer
Isochronous Transfer
Non-Return-to-Zero-Invert
NRZI
PLL
Protocol
Transaction
Transfer
Transfer Type
Universal Serial Bus
Universal Serial Bus Interface
USB
Explanation
The amount of data transmitted per unit of time, typically bits per second (bps) or bytes per second (Bps).
A unit of information used by digital computers. Represents the smallest piece of addressable memory within a
computer. A bit expresses the choice between two possibilities and is typically represented by a logical one (1) or
zero (0).
Insertion of a “0” bit into a data stream to cause an electrical transition on the data wires allowing a PLL to remain
locked.
Nonperiodic, large burst communication typically used for a transfer that can use any available bandwidth and also
be delayed until bandwidth is available.
One of four Universal Serial Bus Transfer Types. Control transfers support configuration/command/status type
communications between client and function.
See Cyclic Redundancy Check.
A check performed on data to see if an error has occurred in transmitting, reading, or writing the data. The result
of a CRC is typically stored or transmitted with the checked data. The stored or transmitted result is compared to
a CRC calculated for the data to determine if an error has occurred.
A uniquely identifiable portion of a Universal Serial Bus device that is the source or sink of information in a
communication flow between the host and device.
See Device Endpoint.
One of four Universal Serial Bus Transfer Types. Interrupt transfers characteristics are small data, non-periodic,
low frequency, bounded latency, device initiated communication typically used to notify the host of device service
needs.
One of four Universal Serial Bus Transfer Types. Isochronous transfers are used when working with isochronous
data. Isochronous transfers provide periodic, continuous communication between host and device.
A method of encoding serial data in which ones and zeroes are represented by opposite and alternating high and
low voltages where there is no return to zero (reference) voltage between encoded bits. Eliminates the need for
clock pulses.
See Non-Return-to-Zero-Invert.
Phase Locked Loop. A circuit that acts as a phase detector to keep an oscillator in phase with an incoming
frequency.
A specific set of rules, procedures, or conventions relating to format and timing of data transmission between two
devices.
The delivery of service to an endpoint. Consists of a token packet, optional data packet, and optional handshake
packet. Specific packets are allowed/required based on the transaction type.
One or more bus transactions to move information between a software client and its function.
Determines the characteristics of the data flow between a software client and its function. Four Transfer types are
defined: control, interrupt, bulk, and isochronous.
A collection of Universal Serial Bus devices and the software and hardware that allow them to connect the
capabilities provided by functions to the host.
The hardware interface between the Universal Serial Bus cable and a Universal Serial Bus device. This includes the
protocol engine required for all Universal Serial Bus devices to be able to receive and send packets.
See Universal Serial Bus.
Oki Semiconductor
9
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| Páginas | Total 17 Páginas | |
| PDF Descargar | [ Datasheet MSM13R0000.PDF ] | |
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