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PDF AD9237 Data sheet ( Hoja de datos )
| Número de pieza | AD9237 | |
| Descripción | Low Power A/D Converter | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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Data Sheet
12-Bit, 20 MSPS/40 MSPS/65 MSPS
3 V Low Power A/D Converter
AD9237
FEATURES
Ultralow power
85 mW at 20 MSPS
135 mW at 40 MSPS
190 mW at 65 MSPS
SNR = 66 dBc to Nyquist at 65 MSPS
SFDR = 80 dBc to Nyquist at 65 MSPS
DNL = ±0.7 LSB
Differential input with 500 MHz bandwidth
Flexible analog input: 1 V p-p to 4 V p-p range
Offset binary, twos complement, or gray code data formats
Output enable pin
2-step power-down
Full power-down and sleep mode
Clock duty cycle stabilizer
APPLICATIONS
Ultrasound and medical imaging
Battery-powered instruments
Hand-held scope meters
Low cost digital oscilloscopes
Low power digital still cameras and copiers
Low power communications
GENERAL DESCRIPTION
The AD9237 is a family of monolithic, single 3 V supply, 12-bit,
20 MSPS/40 MSPS/65 MSPS analog-to-digital converters
(ADC). This family features a high performance sample-and-
hold amplifier (SHA) and voltage reference. The AD9237 uses a
multistage differential pipelined architecture with output error
correction logic to provide 12-bit accuracy at 20 MSPS/
40 MSPS/65 MSPS data rates and guarantees no missing codes
over the full operating temperature range.
With significant power savings over previously available ADCs,
the AD9237 is suitable for applications in imaging and medical
ultrasound.
Fabricated on an advanced CMOS process, the AD9237 is
available in a 32-lead LFCSP and is specified over the industrial
temperature range (−40°C to +85°C).
FUNCTIONAL BLOCK DIAGRAM
AVDD
DRVDD
VIN+
VIN–
REFT
REFB
SHA
MODE2
VREF
SENSE
REF
SELECT
MDAC1
4
A/D
10-STAGE
1 1/2-BIT
PIPELINE
15
A/D
3
CORRECTION LOGIC
12
OUTPUT BUFFERS
AD9237
CLOCK
DUTY CYCLE
STABILIZER
0.5V
MODE
SELECT
OE
OTR
D11
D0
AGND
CLK
PDWN
Figure 1.
MODE
DGND
PRODUCT HIGHLIGHTS
1. Operating at 65 MSPS, the AD9237 consumes a low 190 mW
at 65 MSPS, 135 mW at 40 MSPS, and 85 mW at 20 MSPS.
2. Power scaling reduces the operating power further when
running at lower speeds.
3. The AD9237 operates from a single 3 V power supply and
features a separate digital output driver supply to
accommodate 2.5 V and 3.3 V logic families.
4. The patented SHA input maintains excellent performance
for input frequencies beyond Nyquist and can be configured
for single-ended or differential operation.
5. The AD9237 is optimized for selectable and flexible input
ranges from 1 V p-p to 4 V p-p.
6. An output enable pin allows for multiplexing of the outputs.
7. Two-step power-down supports a standby mode in addition
to a power-down mode.
8. The OTR output bit indicates when the signal is beyond the
selected input range.
9. The clock duty cycle stabilizer (DCS) maintains converter
performance over a wide range of clock pulse widths.
Rev. C
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityisassumedbyAnalogDevices for itsuse,nor foranyinfringementsofpatentsor other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2005–2014 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
1 page  
AD9237
Data Sheet
DIGITAL SPECIFICATIONS
Table 2.
Parameter
LOGIC INPUTS
High Level Input Voltage
Low Level Input Voltage
High Level Input Current
Low Level Input Current
Input Capacitance
LOGIC OUTPUTS1
DRVDD = 3.3 V
High-Level Output Voltage (IOH = 50 µA)
High-Level Output Voltage (IOH = 0.5 mA)
Low-Level Output Voltage (IOL = 1.6 mA)
Low-Level Output Voltage (IOL = 50 µA)
DRVDD = 2.5 V
High-Level Output Voltage (IOH = 50 µA)
High-Level Output Voltage (IOH = 0.5 mA)
Low-Level Output Voltage (IOL = 1.6 mA)
Low-Level Output Voltage (IOL = 50 µA)
AD9237BCP-20
Min Typ Max
2.0
–10
–10
2
0.8
+10
+10
3.29
3.25
0.2
0.05
2.49
2.45
0.2
0.05
1 Output voltage levels measured with 5 pF load on each output.
AD9237BCP-40
Min Typ Max
2.0
–10
–10
2
0.8
+10
+10
3.29
3.25
0.2
0.05
2.49
2.45
0.2
0.05
AD9237BCP-65
Min Typ Max
2.0
–10
–10
2
0.8
+10
+10
3.29
3.25
0.2
0.05
2.49
2.45
0.2
0.05
Unit
V
V
µA
µA
pF
V
V
V
V
V
V
V
V
AC SPECIFICATIONS
AVDD = 3 V, DRVDD = 2.5 V, maximum sample rate, 2 V p-p differential input, AIN = –0.5 dBFS, 1.0 V internal reference, TMIN to TMAX,
unless otherwise noted.
Table 3.
Parameter
SIGNAL-TO-NOISE RATIO (SNR)
fINPUT = 2.4 MHz
fINPUT = 9.7 MHz
fINPUT = 19.6 MHz
fINPUT = 34.2 MHz
fINPUT = 70 MHz
SIGNAL-TO-NOISE RATIO AND DISTORTION (SINAD)
fINPUT = 2.4 MHz
fINPUT = 9.7 MHz
fINPUT = 19.6 MHz
fINPUT = 34.2 MHz
fINPUT = 70 MHz
EFFECTIVE NUMBER OF BITS (ENOB)
fINPUT = 9.7 MHz
fINPUT = 19.6 MHz
fINPUT = 34.2 MHz
AD9237BCP-20
AD9237BCP-40
AD9237BCP-65
Min Typ Max Min Typ Max Min Typ Max Unit
66.8
65.6 66.6
66.0
66.5
65.3 66.6
66.3
66.5
64.0 66.1
65.9
dBc
dBc
dBc
dBc
dBc
66.7
65.1 66.5
65.6
66.4
64.4 66.4
65.8
66.3
63.5 65.8
65.2
dBc
dBc
dBc
dBc
dBc
10.8 Bits
10.7 Bits
10.6 Bits
Rev. C | Page 4 of 24
5 Page 
AD9237
EQUIVALENT CIRCUITS
AVDD
VIN+, VIN–
Figure 4. Equivalent Analog Input Circuit
MODE,
MODE2,
GC, OE
375Ω
70kΩ
Figure 5. Equivalent MODE, MODE2, GC, OE Input Circuit
Data Sheet
DRVDD
D11–D0,
OTR
Figure 6. Equivalent Digital Output Circuit
CLK,
PDWN
375Ω
Figure 7. Equivalent CLK, PDWN Input Circuit
Rev. C | Page 10 of 24
11 Page | ||
| Páginas | Total 25 Páginas | |
| PDF Descargar | [ Datasheet AD9237.PDF ] | |
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