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ADE7169F16 Schematic ( PDF Datasheet ) - Analog Devices

Teilenummer ADE7169F16
Beschreibung Single-Phase Energy Measurement IC
Hersteller Analog Devices
Logo Analog Devices Logo 




Gesamt 30 Seiten
ADE7169F16 Datasheet, Funktion
www.DataSheet4U.com
Preliminary Technical Data
Single-Phase Energy Measurement IC with
8052 MCU, RTC and LCD driver
ADE7169F16
GENERAL FEATURES
Wide supply voltage operation 2.4 to 3.7V
Battery supply input with Automatic switch-over
Reference 1.2 V ± 1% (drift 50 ppm/°C Maximum)
64-Lead Quad Flat (LQFP) or Chip Scale (LCSP) Lead Free
Packages
Operating Temperature -40°C to 85°C
ENERGY MEASUREMENT FEATURES
High accuracy active, reactive energy measurement IC,
supports IEC 62053-21, 62053-22, 62053-23
Two differential inputs with PGAs to support Shunt, Current
Transformer and di/dt current sensors
Selectable Digital integrator to support di/dt current sensor
Digital parameters for Gain, offset and phase compensation
Selectable No-load threshold level for Watt, VA, and VAR
anti-creep
Less than 0.1% error on active energy over a dynamic range
of 1000 to 1 @ 25C
Less than 0.5% error on reactive energy over a dynamic
range of 1000 to 1 @ 25C
Less than 0.5% error on rms measurements over a dynamic
range of 1000 to 1 for current and 100:1 for voltage @ 25C
Auto-calibration of offsets
High frequency outputs supply proportional to Irms, active,
reactive or apparent power
Proprietary ADCs and DSP provide high accuracy over large
variations in environmental conditions and time
Temperature monitoring
MICROPROCESSOR FEATURES
8052 based core
Single-cycle 4MIPS 8052 core
8052 compatible instruction set
32.768 kHz external crystal with on-chip PLL
Two external interrupt sources
External reset pin
Real Time Clock
Counter for seconds, minutes and hours
Automatic battery switchover for RTC back up
Ultra-Low Battery Supply Current < 1μA
Software clock calibration with temperature and offset
compensation
Integrated LCD driver
104-segment with 2, 3 or 4 Multiplexer
3V/5V driving capability
Internally generated LCD drive voltages
Temperature and Supply compensated drive voltages
Low power battery mode
Wake-up from I/O and UART
LCD driver capability
On-chip peripherals
UART, SPI or I2C
Watch-Dog timer
Power Supply Monitoring with User Selectable Levels
Memory: 16kBytes Flash Memory, 512 Bytes RAM
Development tools
Single pin emulation
IDE based assembly and C source debugging
GENERAL DESCRIPTION
The ADE7169F16 integrates Analog Devices Energy (ADE) Metering IC analog front end and fixed function DSP solution with
an enhanced 8052 MCU core, a RTC, an LCD driver and all the peripherals to make an electronic energy meter with LCD
display with a single part.
The ADE Energy Measurement core includes Active, Reactive, Apparent Energy calculations, as well as voltage and current rms
measurements. This information is ready to use for energy billing by using built-in energy scalars. Many power line
supervisory features like SAG, Peak, Zero-crossing are also included in the energy measurement DSP to simplify energy meter
design.
The microprocessor functionality includes a single cycle 8052 core, a Real Time Clock with a power supply back-up pin, a
UART, and a SPI or I2C interface. The ready to use information from the ADE core reduces the program memory size
requirement thus making it easy to integrate complicated design in 16k Bytes of Flash memory.
The ADE7169F16 also includes a 104-segment LCD driver. This driver generates voltages capable of driving 5V LCDs.
Rev. PrD 09/06
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.326.8703 © 2006 Analog Devices, Inc. All rights reserved.






ADE7169F16 Datasheet, Funktion
ADE7169F16
Mode 2 (9- bit UART with baud fixed at Fcore/64 or Fcore/32)
................................................................................................. 119
Mode 3 (9-Bit UART with Variable Baud Rate)............... 120
UART Baud Rate Generation.................................................. 120
Mode 0 Baud Rate Generation ........................................... 120
Mode 2 Baud Rate Generation ........................................... 120
Modes 1 and 3 Baud Rate Generation ............................... 120
Timer 1 Generated Baud Rates........................................... 120
Timer 2 Generated Baud Rates........................................... 120
UART Timer Generated Baud Rates.................................. 121
UART additional features........................................................ 122
Enhanced Error Checking................................................... 122
UART TxD signal modulation ........................................... 122
Serial Peripheral Interface Interface (SPI)................................. 123
SPI SFR register list .................................................................. 123
SPI pins ...................................................................................... 126
MISO (Master In, Slave Out Data I/O Pin) ...................... 126
MOSI (Master Out, Slave In Pin)....................................... 126
SCLK (Serial Clock I/O Pin)............................................... 126
SS (Slave Select Pin) ............................................................. 126
Preliminary Technical Data
SPI Master Operating Modes.................................................. 126
SPI Interrupt and Status Flags ................................................ 127
I2C COMPATIBLE INTERFACE ............................................... 129
Serial Clock Generation .......................................................... 129
Slave addresses.......................................................................... 129
I2C SFR register list.................................................................. 129
Read and Write Operations .................................................... 130
I2C Receive and Transmit FIFOs ........................................... 131
Dual Data Pointers ....................................................................... 132
I/O Ports ........................................................................................ 134
Parallel I/O ................................................................................ 134
Weak Internal Pullups Enabled.......................................... 134
Open Drain (Weak Internal Pullups Disabled) ............... 134
38 kHz Modulation .............................................................. 134
I/O SFR register list.................................................................. 135
Port 0.......................................................................................... 137
Port 1.......................................................................................... 138
Port 2.......................................................................................... 138
Outline Dimensions ..................................................................... 139
Ordering Guide............................................................................. 140
Rev. PrD | Page 6 of 140

6 Page









ADE7169F16 pdf, datenblatt
ADE7169F16
Table 3. I2C COMPATIBLE INTERFACE TIMING Parameter
Parameter
tL SCLOCK Low Pulse Width
tH SCLOCK High Pulse Width
tSHD Start Condition Hold Time
tDSU Data Setup Time
tDHD Data Hold Time
tRSU Setup Time for Repeated Start
tPSU Stop Condition Setup Time
tBUF Bus Free Time between a Stop Condition and a Start Condition
tR Rise Time of Both SCLOCK and SDATA
tF Fall Time of Both SCLOCK and SDATA
tSUP1 Pulse Width of Spike Suppressed
____________________________________________
1 Input filtering on both the SCLOCK and SDATA inputs suppresses noise spikes less than 50 ns.
Preliminary Technical Data
Min Max
1.95
1.95
TBD
TBD
TBD
TBD
TBD
TBD
300
300
50
Unit
μs
μs
μs
μs
μs
μs
μs
μs
ns
ns
ns
tBUF
tSUP
SDATA (I/O)
MSB
LSB
ACK
tPSU
tDSU
tSHD
tDHD
tDSU
tH
tDHD
tRSU
SCLK (I)
PS
STOP
START
CONDITION CONDITION
1
2-7
tL
8
tSUP
9
S(R)
REPEATED
START
Figure 3. I2C Compatible Interface Timing
tR
MSB
tF
tR
1
tF
Rev. PrD | Page 12 of 140

12 Page





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