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Teilenummer | S71GL064A |
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Beschreibung | STACKED MULTI CHIP PRODUCT FLASH MEMORY AND RAM | |
Hersteller | SPANSION | |
Logo | ||
Gesamt 70 Seiten www.DataSheet4U.com
S71GL064A Based MCPs
Stacked Multi-Chip Product (MCP) Flash Memory and RAM
64 Megabit (4 M x 16-bit) CMOS 3.0 Volt-only Page Mode Flash
Memory and 16/8 Megabit (1M/512K x 16-bit)
Pseudo Static RAM / Static RAM
ADVANCE
INFORMATION
Notice to Readers: The Advance Information status indicates that this
document contains information on one or more products under development
at Spansion LLC. The information is intended to help you evaluate this product.
Do not design in this product without contacting the factory. Spansion LLC
reserves the right to change or discontinue work on this proposed product
without notice.
Publication Number S71GL064A_00 Revision A Amendment 2 Issue Date February 8, 2005
Advance Information
S71GL064A based MCPs
Distinctive Characteristics . . . . . . . . . . . . . . . . . . . 1
MCP Features ........................................................................................................ 1
General Description . . . . . . . . . . . . . . . . . . . . . . . . 1
Product Selector Guide . . . . . . . . . . . . . . . . . . . . . .3
64 Mb Flash Memory ............................................................................................3
Connection Diagram (S71GL064A) . . . . . . . . . . . . .8
Special Handling Instructions For FBGA Package ...................................8
Pin Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Ordering Information . . . . . . . . . . . . . . . . . . . . . . . 10
Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . . . 12
TLC056—56-ball Fine-Pitch Ball Grid Array (FBGA)
9 x 7 mm Package ............................................................................................... 12
S29GLxxxA MirrorBit™ Flash Family
Distinctive Characteristics 13
General Description . . . . . . . . . . . . . . . . . . . . . . . . 14
Product Selector Guide . . . . . . . . . . . . . . . . . . . . . 15
S29GL064A ............................................................................................................15
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Logic Symbols . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Device Bus Operations . . . . . . . . . . . . . . . . . . . . . . 19
Table 1. Device Bus Operations ........................................... 19
Requirements for Reading Array Data ......................................................... 19
Page Mode Read ............................................................................................. 20
Writing Commands/Command Sequences ................................................ 20
Write Buffer .................................................................................................... 20
Accelerated Program Operation .............................................................. 20
Autoselect Functions ..................................................................................... 21
Standby Mode ....................................................................................................... 21
Automatic Sleep Mode ...................................................................................... 21
RESET#: Hardware Reset Pin ......................................................................... 21
Output Disable Mode ........................................................................................ 21
Table 2. S29GL064A Top Boot Sector Architecture ................. 22
Table 3. S29GL064A Bottom Boot Sector Architecture ............ 25
Autoselect Mode ................................................................................................ 29
Table 4. Autoselect Codes, (High Voltage Method) ................ 30
Sector Group Protection and Unprotection ............................................. 30
Table 5. S29GL064A Sector Group
Protection/Unprotection Address ......................................... 31
Figure 1. Temporary Sector Group Unprotect Operation .......... 32
Figure 2. In-System Sector Group Protect/Unprotect Algorithms 33
Secured Silicon Sector Flash Memory Region ............................................34
Write Protect (WP#) ........................................................................................35
Hardware Data Protection ..............................................................................35
Low VCC Write Inhibit ................................................................................35
Write Pulse “Glitch” Protection ................................................................35
Logical Inhibit ...................................................................................................35
Power-Up Write Inhibit ................................................................................36
Common Flash Memory Interface (CFI) . . . . . . 36
Table 6. CFI Query Identification String ................................ 37
Table 7. System Interface String .......................................... 37
Table 8. Device Geometry Definition .................................... 38
Table 9. Primary Vendor-Specific Extended Query ................. 38
Command Definitions . . . . . . . . . . . . . . . . . . . . . .40
Reading Array Data ........................................................................................... 40
Reset Command .................................................................................................40
Autoselect Command Sequence .................................................................... 41
Enter Secured Silicon Sector/Exit Secured Silicon
Sector Command Sequence ............................................................................. 41
Word Program Command Sequence ....................................................... 41
Unlock Bypass Command Sequence ........................................................ 42
Write Buffer Programming ......................................................................... 42
Accelerated Program .................................................................................... 44
Figure 3. Write Buffer Programming Operation....................... 45
Figure 4. Program Operation ............................................... 46
Program Suspend/Program Resume Command Sequence .................... 46
Figure 5. Program Suspend/Program Resume ........................ 48
Chip Erase Command Sequence ...................................................................48
Sector Erase Command Sequence . . . . . . . . . . . 49
Figure 6. Erase Operation ................................................... 50
Erase Suspend/Erase Resume Commands .................................................. 50
Table 10. Command Definitions (x16 Mode, BYTE# = VIH) ......52
DQ7: Data# Polling ............................................................................................53
Figure 7. Data# Polling Algorithm ........................................ 54
RY/BY#: Ready/Busy# ....................................................................................... 54
Figure 8. Toggle Bit Algorithm ............................................. 56
Reading Toggle Bits DQ6/DQ2 ..................................................................... 57
DQ5: Exceeded Timing Limits ........................................................................ 57
DQ3: Sector Erase Timer ................................................................................ 58
DQ1: Write-to-Buffer Abort ........................................................................... 58
Table 11. Write Operation Status .........................................58
Figure 9. Maximum Negative Overshoot Waveform................. 59
Figure 10. Maximum Positive Overshoot Waveform ................ 59
Operating Ranges . . . . . . . . . . . . . . . . . . . . . . . . . 59
DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 60
Test Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . .61
Figure 11. Test Setup ......................................................... 61
Table 12. Test Specifications ...............................................61
Key to Switching Waveforms . . . . . . . . . . . . . . . . 62
Figure 12. Input Waveforms and Measurement Levels ............ 62
Read-Only Operations-S29GL064A only ................................................... 63
Figure 13. Read Operation Timings....................................... 63
Figure 14. Page Read Timings.............................................. 64
Hardware Reset (RESET#) .............................................................................. 64
Figure 15. Reset Timings .................................................... 65
Erase and Program Operations-S29GL064A Only .................................. 66
Figure 16. Program Operation Timings.................................. 67
Figure 17. Accelerated Program Timing Diagram .................... 67
Figure 18. Chip/Sector Erase Operation Timings..................... 68
Figure 19. Data# Polling Timings
(During Embedded Algorithms)............................................ 69
Figure 20. Toggle Bit Timings (During Embedded Algorithms) .. 69
Figure 21. DQ2 vs. DQ6...................................................... 70
Temporary Sector Unprotect ........................................................................ 70
Figure 22. Temporary Sector Group Unprotect Timing Diagram 70
Figure 23. Sector Group Protect and Unprotect Timing Diagram 71
Alternate CE# Controlled Erase and
Program Operations-S29GL064A ................................................................. 72
Figure 24. Alternate CE# Controlled Write (Erase/Program)
Operation Timings.............................................................. 73
Erase And Programming Performance . . . . . . . . 74
pSRAM Type 1
Functional Description . . . . . . . . . . . . . . . . . . . . . 75
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . 75
DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 76
4
S71GL064A based MCPs
S71GL064A_00_A2 February 8, 2005
6 Page Advance Information
Ordering Information
The order number is formed by a valid combinations of the following:
S71GL
064 A A0 BA W 9
Table 1:
Z0
PACKING TYPE
0 = Tray
2 = 7” Tape and Reel
3 = 13” Tape and Reel
MODEL NUMBER
See the Valid Combinations table.
PACKAGE MODIFIER
0 = 7 x 9 mm, 1.2 mm height, 56 balls (TLC056)
TEMPERATURE RANGE
W = Wireless (-25°C to +85°C)
I = Industrial (-40°C to +85°C)
PACKAGE TYPE
BA = Fine-pitch BGA Lead (Pb)-free compliant package
BF = Fine-pitch BGA Lead (Pb)-free package
pSRAM / SRAM DENSITY
0A = 16 Mb SRAM
A0 = 16 Mb pSRAM
80 = 8 Mb pSRAM
08 = 8 Mb SRAM
PROCESS TECHNOLOGY
A = 200 nm, MirrorBit Technology
FLASH DENSITY
064 = 64Mb
PRODUCT FAMILY
S71GL Multi-chip Product (MCP)
3.0-volt Page Mode Flash Memory and RAM
10
S71GL064A based MCPs
S71GL064A_00_A2 February 8, 2005
12 Page | ||
Seiten | Gesamt 70 Seiten | |
PDF Download | [ S71GL064A Schematic.PDF ] |
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